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STD8N60DM2

STMicroelectronics · MOSFETs · DPAK

STD8N60DM2 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the MOSFET, with gate-source voltage limited to ±25 V and Zener protection on the gate.
2 D passive Drain terminal, also electrically connected to the TAB; continuous drain current is 8 A at TC = 25 °C with VDS rated at 600 V.
3 S passive Source terminal; source-drain diode continuous current is 8 A and pulsed current is 32 A.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Gate-source voltage VGS -25 25 V 2
Drain current (continuous) ID 8 A TC = 25 °C 2
Drain current (continuous) ID 5 A TC = 100 °C 2
Drain current (pulsed) IDM 32 A Pulse width limited by safe operating area 2
Total power dissipation PTOT 85 W TC = 25 °C 2
Peak diode recovery voltage slope dv/dt(2) 50 V/ns ISD ≤ 8 A, di/dt = 900 A/µs, VDD = 400 V 2
MOSFET dv/dt ruggedness dv/dt(3) 50 V/ns VDS ≤ 480 V 2
Storage temperature range Tstg -55 150 °C 2
Thermal resistance, junction-to-case RthJC 1.47 °C/W 2
Thermal resistance, junction-to-ambient RthJA 50 °C/W Mounted on a 1-inch² FR-4, 2 Oz copper board 2
Avalanche current, repetitive or not repetitive IAR 2.5 A Pulse width limited by Tjmax 2
Single pulse avalanche energy EAS 430 mJ Starting Tj = 25 °C, ID = IAR, VDD = 50 V 2
Drain-source breakdown voltage V(BR)DSS 600 V VGS = 0 V, ID = 1 mA 3
Zero gate voltage drain current IDSS 1 µA VGS = 0 V, VDS = 600 V 3
Zero gate voltage drain current (TC = 125 °C) IDSS 100 µA VGS = 0 V, VDS = 600 V, TC = 125 °C(1) 3
Gate-body leakage current IGSS -5 5 µA VDS = 0 V, VGS = ±25 V 3
Gate threshold voltage VGS(th) 3 4 5 V VDS = VGS, ID = 250 µA 3
Static drain-source on-resistance RDS(on) 550 600 mΩ VGS = 10 V, ID = 4 A 3
Source-drain current ISD 8 A 4
Source-drain current (pulsed) ISDM 32 A 4
Forward on voltage VSD 1.6 V VGS = 0 V, ISD = 8 A 4
Reverse recovery time trr 80 ns ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V 4
Reverse recovery charge Qrr 188 nC ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V 4
Reverse recovery current IRRM 4.7 A ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V 4
Reverse recovery time (Tj = 150 °C) trr 160 ns ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C 4
Reverse recovery charge (Tj = 150 °C) Qrr 640 nC ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C 4
Reverse recovery current (Tj = 150 °C) IRRM 8 A ISD = 8 A, di/dt = 100 A/µs, VDD = 60 V, Tj = 150 °C 4

CAD (KiCad official)

  • Symbol: STD8N60DM2
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: std8n60dm2-etched.step / std8n60dm2-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std8n60dm2.step / std8n60dm2.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (19 pp, sha256 f4ee411e23dda890, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF