component
STD6N65M2
Public Made by Adomby adom
STMicroelectronics MOSFETs, DPAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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STD6N65M2
STMicroelectronics · MOSFETs · DPAK
STD6N65M2 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate drive terminal; maximum gate-source voltage is ±25 V with gate threshold voltage of 3 V typical at 250 µA drain current. |
| 2 | Drain | tri_state | Drain terminal rated for 4 A continuous drain current at 25 °C (2.5 A at 100 °C) with maximum drain-source voltage of 650 V and on-resistance of 1.35 Ω maximum. |
| 3 | Source | power_in | Source terminal serving as the return path; typically grounded with maximum gate-source voltage of ±25 V and leakage current of 1 µA maximum at 650 V drain-source voltage. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
STD6N65M2 - Footprint:
Package_TO_SOT_SMD:TO-252-2 - 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files:
std6n65m2-etched.step/std6n65m2-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);std6n65m2.step/std6n65m2.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (22 pp, sha256
8f360d592007664e, retrieved 2026-10-07, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STD6N65M2
**STMicroelectronics** · MOSFETs · DPAK
STD6N65M2 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate drive terminal; maximum gate-source voltage is ±25 V with gate threshold voltage of 3 V typical at 250 µA drain current. |
| 2 | Drain | tri_state | Drain terminal rated for 4 A continuous drain current at 25 °C (2.5 A at 100 °C) with maximum drain-source voltage of 650 V and on-resistance of 1.35 Ω maximum. |
| 3 | Source | power_in | Source terminal serving as the return path; typically grounded with maximum gate-source voltage of ±25 V and leakage current of 1 µA maximum at 650 V drain-source voltage. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DPAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `STD6N65M2`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: DPAK (KiCad packages3D, STEP)
- 3D model files: `std6n65m2-etched.step` / `std6n65m2-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `std6n65m2.step` / `std6n65m2.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/std6n65m2.pdf) (22 pp, sha256 `8f360d592007664e`, retrieved 2026-10-07, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/std6n65m2-datasheet.pdf)