STD4N62K3 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	G	input	Gate of the N-channel MDmesh K3 MOSFET, with gate-source voltage rated at ±30 V in absolute maximum ratings.
2	D	passive	Drain, also connected to the TAB; continuous drain current is 3.8 A at TC = 25 °C with VDS rated at 620 V.
3	S	passive	Source of the MOSFET; pulsed drain current is rated at 15.2 A and the maximum junction temperature is not stated as a pin limit.

Key specifications

Parameter	Value
Manufacturer	STMicroelectronics
Package	DPAK
Category	Transistors/Thyristors
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Drain-source voltage	VDS			620	V		2
Gate-source voltage	VGS	-30		30	V		2
Drain current (continuous)	ID			3.8	A	TC = 25 °C	2
Drain current (continuous)	ID			2	A	TC = 100 °C	2
Drain current (pulsed)	IDM			15.2	A		2
Total power dissipation	PTOT			70	W	TC = 25 °C	2
Avalanche current, repetitive or not-repetitive	IAR			3.8	A		2
Single pulse avalanche energy	EAS			115	mJ		2
Gate-source human body model ESD	ESD			2.5	kV	R = 1.5 kΩ, C = 100 pF	2
Peak diode recovery voltage slope	dv/dt			12	V/ns		2
Storage temperature range	Tstg	-55		150	°C		2
Thermal resistance, junction-to-case	RthJC			1.79	°C/W		2
Thermal resistance, junction-to-ambient	RthJA			50	°C/W	When mounted on 1 inch2 FR-4, 2 Oz copper board	2
Drain-source breakdown voltage	V(BR)DSS	620			V	ID = 1 mA, VGS = 0 V	3
Zero gate voltage drain current	IDSS			1	µA	VGS = 0 V, VDS = 620 V	3
Zero gate voltage drain current	IDSS			50	µA	VGS = 0 V, VDS = 620 V, TC = 125 °C	3
Gate body leakage current	IGSS	-10		10	µA	VGS = ±20 V, VDS = 0 V	3
Gate threshold voltage	VGS(th)	3	3.75	4.5	V	VDS = VGS, ID = 50 µA	3
Static drain-source on-resistance	RDS(on)		1.7	2	Ω	VGS = 10 V, ID = 1.9 A	3
Intrinsic gate resistance	RG	2	5	10	Ω	f = 1 MHz, ID = 0 A	3
Source-drain current	ISD			3.8	A		4
Source-drain current (pulsed)	ISDM			15.2	A		4
Forward on voltage	VSD			1.6	V	ISD = 3.8 A, VGS = 0 V	4
Reverse recovery time	trr			220	ns	ISD = 3.8 A, di/dt = 100 A/µs, VDD = 60 V	4
Reverse recovery charge	Qrr			1.4	μC	ISD = 3.8 A, di/dt = 100 A/µs, VDD = 60 V	4
Reverse recovery current	IRRM			13	A	ISD = 3.8 A, di/dt = 100 A/µs, VDD = 60 V	4
Reverse recovery time	trr			270	ns	ISD = 3.8 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C	4
Reverse recovery charge	Qrr			1.9	μC	ISD = 3.8 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C	4
Reverse recovery current	IRRM			14	A	ISD = 3.8 A, di/dt = 100 A/µs, VDD = 60 V, TJ = 150 °C	4

CAD (KiCad official)

Symbol: STD4N62K3
Footprint: Package_TO_SOT_SMD:TO-252-2
3D model: DPAK (KiCad packages3D, STEP)
3D model files: std4n62k3-etched.step / std4n62k3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std4n62k3.step / std4n62k3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: STMicroelectronics datasheet (18 pp, sha256 b9e8f7e9c6169a22, retrieved 2026-11-05, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

STD4N62K3

Verified STD4N62K3

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

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