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Contents

README

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STD45P4LLF6AG

STMicroelectronics · MOSFETs · DPAK

STD45P4LLF6AG from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control terminal; applies gate-source voltage (±18 V maximum) to control MOSFET switching state.
2 D passive Drain terminal with -40 V maximum drain-source voltage rating and -50 A continuous drain current at 25°C; metallic tab provides thermal connection to case.
3 S passive Source terminal with -40 V maximum drain-source voltage rating; provides current return path for the device.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STD45P4LLF6AG
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: std45p4llf6ag-etched.step / std45p4llf6ag-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std45p4llf6ag.step / std45p4llf6ag.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (16 pp, sha256 6216b6926025d275, retrieved 2026-09-27, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF