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Contents

README

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STD3N80K5

STMicroelectronics · MOSFETs · DPAK

STD3N80K5 from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control input rated for ±30 V gate-source voltage with threshold voltage 3-5 V.
2 D passive Drain terminal rated for 2.5 A continuous current at TC=25°C and 800 V drain-source breakdown voltage; TAB connects to drain for thermal dissipation.
3 S power_in Source terminal provides current return path; rated for ±30 V maximum gate-source voltage and 2.5 A reverse diode current.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STD3N80K5
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: std3n80k5-etched.step / std3n80k5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std3n80k5.step / std3n80k5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (15 pp, sha256 bcbaca3464ed81e8, retrieved 2026-09-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF