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Contents

README

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STD15P6F6AG

STMicroelectronics · MOSFETs · DPAK

STD15P6F6AG from STMicroelectronics, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate control input with maximum gate-source voltage of ±20 V and gate-source threshold voltage ranging from -2 to -4 V
2 Drain power_out Drain terminal with maximum drain-source voltage of -60 V, continuous drain current of -10 A at 25 °C or -7.2 A at 100 °C, and connected to TAB for heat dissipation
3 Source power_in Source reference terminal with maximum gate-source voltage of ±20 V and maximum gate-source leakage current of ±100 nA

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STD15P6F6AG
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: std15p6f6ag-etched.step / std15p6f6ag-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); std15p6f6ag.step / std15p6f6ag.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (15 pp, sha256 622ac41afa0e9de8, retrieved 2026-10-03, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF