component
STC8H1K17-36I-QFN20
Public Made by Adomby adom
STC Micro Microcontrollers (MCU/MPU/SOC), QFN-20-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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STC8H1K17-36I-QFN20
STC Micro · Microcontrollers (MCU/MPU/SOC) · QFN-20-EP(3x3)
STC8H1K17-36I-QFN20 from STC Micro, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.5 | bidirectional | General-purpose I/O (quasi-bidirectional, push-pull, open-drain or high-impedance input mode); alternate functions are SCLK (SPI clock), SCL (I2C clock) and PWM3N (PWM3 complementary output). |
| 2 | P1.6 | bidirectional | General-purpose I/O; alternate functions are XTALO (external crystal output), RxD_3 (UART1 receive), PWM4P (PWM4 capture/output) and MCLKO_2 (master clock divided output). |
| 3 | P1.7 | bidirectional | General-purpose I/O; alternate functions are XTALI (external crystal/clock input), TxD_3 (UART1 transmit), PWM4N (PWM4 negative output) and PWM5_2. |
| 4 | P5.4 | bidirectional | General-purpose I/O by default; can be set to the active-low reset pin nRST via ISP, and alternate functions are MCLKO (master clock output) and PWM6_2. |
| 5 | Vcc | power_in | Power supply pin (AVcc also serves as the ADC supply); the family operating voltage is 1.9 V to 5.5 V. |
| 6 | ADC_VRef+ | input | ADC external reference voltage input, which must be driven by an external reference from 2.4 V up to MCU-VCC because a floating pin leaks current; it may be tied to VCC when accuracy requirements are low. |
| 7 | Gnd | power_in | Ground pin (AGnd is the ADC ground). |
| 8 | P3.0 | bidirectional | General-purpose I/O; after power-on it is in quasi-bidirectional/weak-pull-up state, with alternate functions RxD (UART1 receive), INT4 (external interrupt 4) and ADC8. |
| 9 | P3.1 | bidirectional | General-purpose I/O; after power-on it is in quasi-bidirectional/weak-pull-up state, with alternate functions TxD (UART1 transmit) and ADC9. |
| 10 | P3.2 | bidirectional | General-purpose I/O; alternate functions are INT0 (external interrupt 0), ADC10, SCLK_4, SCL_4, PWMETI and PWMETI2. |
| 11 | P3.3 | bidirectional | General-purpose I/O; alternate functions are INT1 (external interrupt 1), ADC11, MISO_4, SDA_4, PWM4N_4 and PWM7_2. |
| 12 | P3.4 | bidirectional | General-purpose I/O; alternate functions are T0 (timer 0 external clock), ADC12, T1CLKO, MOSI_4, PWM4P_4, PWM8_2 and CMPO (comparator output). |
| 13 | P3.5 | bidirectional | General-purpose I/O; alternate functions are T1 (timer 1 external clock), ADC13, T0CLKO, SS_4, PWMFLT and PWMFLT2 (PWM fault detection inputs). |
| 14 | P3.6 | bidirectional | General-purpose I/O; alternate functions are INT2 (external interrupt 2, falling edge only), RxD_2 (UART1 receive), ADC14 and CMP- (comparator negative input). |
| 15 | P3.7 | bidirectional | General-purpose I/O; alternate functions are INT3 (external interrupt 3, falling edge only), TxD_2 (UART1 transmit), and CMP+ (comparator positive input). |
| 16 | P1.0 | bidirectional | General-purpose I/O; alternate functions are ADC0 (analog input 0), RxD2 (UART2 receive) and PWM1P (PWM1 capture/output positive). |
| 17 | P1.4 | bidirectional | General-purpose I/O; alternate functions are ADC4, MISO (SPI master input), SDA (I2C data) and PWM3P (PWM3 capture/output positive). |
| 18 | P1.3 | bidirectional | General-purpose I/O; alternate functions are ADC3, MOSI (SPI master output), T2CLKO (timer 2 clock divided output) and PWM2N (PWM2 negative output). |
| 19 | P1.2 | bidirectional | General-purpose I/O; alternate functions are ADC2, SS (SPI slave select), T2 (timer 2 external clock input) and PWM2P (PWM2 capture/output positive). |
| 20 | P1.1 | bidirectional | General-purpose I/O; alternate functions are ADC1, TxD2 (UART2 transmit) and PWM1N (PWM1 negative output). |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | QFN-20-EP(3x3) |
| Category | Embedded Processors & Controllers |
| Pins | 21 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I/O pin input low voltage (Schmitt trigger on) | VIL1 | 0.99 | V | 打开施密特触发 | 1852 | ||
| I/O pin input low voltage (Schmitt trigger off) | VIL1 | 1.07 | V | 关闭施密特触发 | 1852 | ||
| I/O pin input high voltage, normal I/O (Schmitt trigger on) | VIH1 | 1.18 | V | 打开施密特触发 | 1852 | ||
| I/O pin input high voltage, normal I/O (Schmitt trigger off) | VIH1 | 1.09 | V | 关闭施密特触发 | 1852 | ||
| Logic 0 input current | IIL | 50 | uA | 端口电压 0V | 1852 | ||
| Logic 1 to 0 transition current | ITL | 100 | 270 | 600 | uA | 端口电压 2.0V | 1852 |
| I/O port pull-up resistance | RPU | 5.8 | 5.9 | 6 | KΩ | 1852 | |
| Operating voltage | 1.9 | 5.5 | V | 1851 | |||
| VDD to GND voltage | VDD | -0.3 | 5.5 | V | 1851 | ||
| I/O pin voltage to GND | -0.3 | V | 1851 | ||||
| Storage temperature | -55 | 150 | ℃ | 1851 | |||
| Operating temperature | -40 | 125 | ℃ | 1851 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following | 1043 |
CAD (KiCad official)
- Symbol:
STC8H1K17-36I-QFN20 - Footprint:
Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm - 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
- 3D model files:
stc8h1k17-36i-qfn20-etched.step/stc8h1k17-36i-qfn20-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stc8h1k17-36i-qfn20.step/stc8h1k17-36i-qfn20.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (2180 pp, sha256
046aea020e4685f3, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STC8H1K17-36I-QFN20
**STC Micro** · Microcontrollers (MCU/MPU/SOC) · QFN-20-EP(3x3)
STC8H1K17-36I-QFN20 from STC Micro, in a QFN-20-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.5 | bidirectional | General-purpose I/O (quasi-bidirectional, push-pull, open-drain or high-impedance input mode); alternate functions are SCLK (SPI clock), SCL (I2C clock) and PWM3N (PWM3 complementary output). |
| 2 | P1.6 | bidirectional | General-purpose I/O; alternate functions are XTALO (external crystal output), RxD_3 (UART1 receive), PWM4P (PWM4 capture/output) and MCLKO_2 (master clock divided output). |
| 3 | P1.7 | bidirectional | General-purpose I/O; alternate functions are XTALI (external crystal/clock input), TxD_3 (UART1 transmit), PWM4N (PWM4 negative output) and PWM5_2. |
| 4 | P5.4 | bidirectional | General-purpose I/O by default; can be set to the active-low reset pin nRST via ISP, and alternate functions are MCLKO (master clock output) and PWM6_2. |
| 5 | Vcc | power_in | Power supply pin (AVcc also serves as the ADC supply); the family operating voltage is 1.9 V to 5.5 V. |
| 6 | ADC_VRef+ | input | ADC external reference voltage input, which must be driven by an external reference from 2.4 V up to MCU-VCC because a floating pin leaks current; it may be tied to VCC when accuracy requirements are low. |
| 7 | Gnd | power_in | Ground pin (AGnd is the ADC ground). |
| 8 | P3.0 | bidirectional | General-purpose I/O; after power-on it is in quasi-bidirectional/weak-pull-up state, with alternate functions RxD (UART1 receive), INT4 (external interrupt 4) and ADC8. |
| 9 | P3.1 | bidirectional | General-purpose I/O; after power-on it is in quasi-bidirectional/weak-pull-up state, with alternate functions TxD (UART1 transmit) and ADC9. |
| 10 | P3.2 | bidirectional | General-purpose I/O; alternate functions are INT0 (external interrupt 0), ADC10, SCLK_4, SCL_4, PWMETI and PWMETI2. |
| 11 | P3.3 | bidirectional | General-purpose I/O; alternate functions are INT1 (external interrupt 1), ADC11, MISO_4, SDA_4, PWM4N_4 and PWM7_2. |
| 12 | P3.4 | bidirectional | General-purpose I/O; alternate functions are T0 (timer 0 external clock), ADC12, T1CLKO, MOSI_4, PWM4P_4, PWM8_2 and CMPO (comparator output). |
| 13 | P3.5 | bidirectional | General-purpose I/O; alternate functions are T1 (timer 1 external clock), ADC13, T0CLKO, SS_4, PWMFLT and PWMFLT2 (PWM fault detection inputs). |
| 14 | P3.6 | bidirectional | General-purpose I/O; alternate functions are INT2 (external interrupt 2, falling edge only), RxD_2 (UART1 receive), ADC14 and CMP- (comparator negative input). |
| 15 | P3.7 | bidirectional | General-purpose I/O; alternate functions are INT3 (external interrupt 3, falling edge only), TxD_2 (UART1 transmit), and CMP+ (comparator positive input). |
| 16 | P1.0 | bidirectional | General-purpose I/O; alternate functions are ADC0 (analog input 0), RxD2 (UART2 receive) and PWM1P (PWM1 capture/output positive). |
| 17 | P1.4 | bidirectional | General-purpose I/O; alternate functions are ADC4, MISO (SPI master input), SDA (I2C data) and PWM3P (PWM3 capture/output positive). |
| 18 | P1.3 | bidirectional | General-purpose I/O; alternate functions are ADC3, MOSI (SPI master output), T2CLKO (timer 2 clock divided output) and PWM2N (PWM2 negative output). |
| 19 | P1.2 | bidirectional | General-purpose I/O; alternate functions are ADC2, SS (SPI slave select), T2 (timer 2 external clock input) and PWM2P (PWM2 capture/output positive). |
| 20 | P1.1 | bidirectional | General-purpose I/O; alternate functions are ADC1, TxD2 (UART2 transmit) and PWM1N (PWM1 negative output). |
| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | QFN-20-EP(3x3) |
| Category | Embedded Processors & Controllers |
| Pins | 21 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| I/O pin input low voltage (Schmitt trigger on) | VIL1 | | | 0.99 | V | 打开施密特触发 | 1852 |
| I/O pin input low voltage (Schmitt trigger off) | VIL1 | | | 1.07 | V | 关闭施密特触发 | 1852 |
| I/O pin input high voltage, normal I/O (Schmitt trigger on) | VIH1 | 1.18 | | | V | 打开施密特触发 | 1852 |
| I/O pin input high voltage, normal I/O (Schmitt trigger off) | VIH1 | 1.09 | | | V | 关闭施密特触发 | 1852 |
| Logic 0 input current | IIL | | | 50 | uA | 端口电压 0V | 1852 |
| Logic 1 to 0 transition current | ITL | 100 | 270 | 600 | uA | 端口电压 2.0V | 1852 |
| I/O port pull-up resistance | RPU | 5.8 | 5.9 | 6 | KΩ | | 1852 |
| Operating voltage | | 1.9 | | 5.5 | V | | 1851 |
| VDD to GND voltage | VDD | -0.3 | | 5.5 | V | | 1851 |
| I/O pin voltage to GND | | -0.3 | | | V | | 1851 |
| Storage temperature | | -55 | | 150 | ℃ | | 1851 |
| Operating temperature | | -40 | | 125 | ℃ | | 1851 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following | 1043 |
## CAD (KiCad official)
- Symbol: `STC8H1K17-36I-QFN20`
- Footprint: `Package_DFN_QFN:UQFN-20-1EP_3x3mm_P0.4mm_EP1.85x1.85mm`
- 3D model: QFN-20-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `stc8h1k17-36i-qfn20-etched.step` / `stc8h1k17-36i-qfn20-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stc8h1k17-36i-qfn20.step` / `stc8h1k17-36i-qfn20.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STC Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8756362111113416704) (2180 pp, sha256 `046aea020e4685f3`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stc8h1k17-36i-qfn20-datasheet.pdf)