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Ray Publish 0.1.0 51570ca 6d ago
{
  "slug": "stc8c2k32s2-36i-lqfp32",
  "version": "0.1.0",
  "type": "component",
  "description": "STC Micro Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "stc8c2k32s2-36i-lqfp32",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "stc8c2k32s2-36i-lqfp32.kicad_sym",
    "stc8c2k32s2-36i-lqfp32.kicad_mod",
    "stc8c2k32s2-36i-lqfp32.glb",
    "stc8c2k32s2-36i-lqfp32.step",
    "stc8c2k32s2-36i-lqfp32.lbr",
    "docs/hero.png",
    "docs/stc8c2k32s2-36i-lqfp32-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "stc8c2k32s2-36i-lqfp32-hero.glb",
    "stc8c2k32s2-36i-lqfp32-hero.overlay.json",
    "stc8c2k32s2-36i-lqfp32-etched.glb"
  ],
  "component": {
    "mpn": "STC8C2K32S2-36I-LQFP32",
    "manufacturer": "STC Micro",
    "package": "LQFP-32(7x7)",
    "pin_count": 32,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589834966927777792",
    "parts": {
      "symbol": "stc8c2k32s2-36i-lqfp32.kicad_sym",
      "footprint": "stc8c2k32s2-36i-lqfp32.kicad_mod",
      "model_3d": "stc8c2k32s2-36i-lqfp32-hero.glb",
      "model_3d_plain": "stc8c2k32s2-36i-lqfp32-etched.glb",
      "model_3d_step": "stc8c2k32s2-36i-lqfp32-etched.step",
      "model_3d_step_plain": "stc8c2k32s2-36i-lqfp32.step",
      "lbr": "stc8c2k32s2-36i-lqfp32.lbr"
    },
    "distributor_links": {
      "lcsc": "C3013121"
    },
    "distributor_check": {
      "checked_at": "2026-10-20T21:12:23Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P1.0",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.0 that can also serve as the UART2 receive pin RxD2; port modes are quasi-bidirectional, push-pull, high-impedance input and open-drain, and all I/O is high-impedance input after power-up except P3.0 and P3.1."
      },
      {
        "number": "2",
        "name": "P1.1",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.1 that can also serve as the UART2 transmit pin TxD2 (output)."
      },
      {
        "number": "3",
        "name": "P1.2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.2 that can also serve as the SPI slave select input SS (master output) or the Timer 2 external clock input T2."
      },
      {
        "number": "4",
        "name": "P1.3",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.3 that can also serve as the SPI MOSI data line or the Timer 2 clock divided output T2CLKO."
      },
      {
        "number": "5",
        "name": "P1.4",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.4 that can also serve as the SPI MISO data line or the I2C data line SDA."
      },
      {
        "number": "6",
        "name": "P1.5",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.5 that can also serve as the SPI clock SCLK or the I2C clock line SCL."
      },
      {
        "number": "7",
        "name": "P1.6",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.6 that can also serve as the UART1 receive pin RxD_3, the external crystal output XTALO, or the main clock divided output MCLKO_2."
      },
      {
        "number": "8",
        "name": "P1.7",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.7 that can also serve as the UART1 transmit pin TxD_3 or the external crystal/external clock input XTALI."
      },
      {
        "number": "9",
        "name": "P5.4",
        "type": "bidirectional",
        "description": "Standard I/O port P5.4 that can be configured as the active-low reset input RST (P54RST) or as the main clock divided output MCLKO; its internal 4K pull-up stays on when used as RST."
      },
      {
        "number": "10",
        "name": "Vcc",
        "type": "power_in",
        "description": "Power supply pin; the datasheet specifies an operating voltage of 1.9V to 5.5V."
      },
      {
        "number": "11",
        "name": "P5.5",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P5.5."
      },
      {
        "number": "12",
        "name": "Gnd",
        "type": "power_in",
        "description": "Ground pin."
      },
      {
        "number": "13",
        "name": "P3.0",
        "type": "bidirectional",
        "description": "Standard I/O port P3.0 that is quasi-bidirectional with weak pull-up after power-up, and can also serve as UART1 receive RxD or external interrupt INT4; it is also one of the ISP/USB download-mode strap pins (P3.0/P3.1/P3.2 must not all be low at power-on if USB download is not used)."
      },
      {
        "number": "14",
        "name": "P3.1",
        "type": "bidirectional",
        "description": "Standard I/O port P3.1 that is quasi-bidirectional with weak pull-up after power-up, and can also serve as UART1 transmit pin TxD (output); it is also one of the ISP/USB download-mode strap pins."
      },
      {
        "number": "15",
        "name": "P3.2",
        "type": "bidirectional",
        "description": "Standard I/O port P3.2 that can also serve as external interrupt INT0, the SPI clock SCLK_4 or the I2C clock I2CSCL_4; it is the ISP download-mode strap pin."
      },
      {
        "number": "16",
        "name": "P3.3",
        "type": "bidirectional",
        "description": "Standard I/O port P3.3 that can also serve as external interrupt INT1, the SPI MISO_4 line or the I2C data line I2CSDA_4."
      },
      {
        "number": "17",
        "name": "P3.4",
        "type": "bidirectional",
        "description": "Standard I/O port P3.4 that can also serve as Timer 0 external clock T0, Timer 1 clock output T1CLKO, SPI MOSI_4 or comparator output CMPO."
      },
      {
        "number": "18",
        "name": "P3.5",
        "type": "bidirectional",
        "description": "Standard I/O port P3.5 that can also serve as Timer 1 external clock T1, Timer 0 clock output T0CLKO or SPI slave select SS_4."
      },
      {
        "number": "19",
        "name": "P3.6",
        "type": "bidirectional",
        "description": "Standard I/O port P3.6 that can also serve as external interrupt INT2 (falling edge only), the UART1 receive pin RxD_2 or the comparator negative input CMP-."
      },
      {
        "number": "20",
        "name": "P3.7",
        "type": "bidirectional",
        "description": "Standard I/O port P3.7 that can also serve as external interrupt INT3 (falling edge only), the UART1 transmit pin TxD_2 or the comparator positive input CMP+."
      },
      {
        "number": "21",
        "name": "P2.0",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.0."
      },
      {
        "number": "22",
        "name": "P2.1",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.1."
      },
      {
        "number": "23",
        "name": "P2.2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.2 that can also serve as the SPI slave select SS_2 (second SPI pin group)."
      },
      {
        "number": "24",
        "name": "P2.3",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.3 that can also serve as the SPI MOSI_2 data line (second SPI pin group)."
      },
      {
        "number": "25",
        "name": "P2.4",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.4 that can also serve as the SPI MISO_2 line or the I2C data line I2CSDA_2."
      },
      {
        "number": "26",
        "name": "P2.5",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.5 that can also serve as the SPI clock SCLK_2 or the I2C clock line I2CSCL_2."
      },
      {
        "number": "27",
        "name": "P2.6",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.6."
      },
      {
        "number": "28",
        "name": "P2.7",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.7."
      },
      {
        "number": "29",
        "name": "P0.0",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P0.0 that can also serve as the UART3 receive pin RxD3."
      },
      {
        "number": "30",
        "name": "P0.1",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P0.1 that can also serve as the UART3 transmit pin TxD3 (output)."
      },
      {
        "number": "31",
        "name": "P0.2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P0.2 that can also serve as the UART4 receive pin RxD4."
      },
      {
        "number": "32",
        "name": "P0.3",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P0.3 that can also serve as the UART4 transmit pin TxD4 (output)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: Package size mismatch: the hint says LQFP-32(7x7), but the datasheet's LQFP32 outline is listed as 9; The MPN STC8C2K32S2 is not given its own LQFP32 diagram. The LQFP32 pin map comes from the STC8C2K64; Pins 21-28 and 13-20 descriptions are taken from the diagram labels on pages 58 and 64 rather than a"
        ],
        "pages_sent": 181,
        "cost_usd": 1.0574,
        "at": "2026-10-20T21:09:21"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589834966927777792",
        "pages": 956,
        "sha256": "f8fa5bab02998432",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "stc8c2k32s2-36i-lqfp32.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "stc8c2k32s2-36i-lqfp32-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          9.0,
          9.0,
          1.5
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "2b8fd06860481c15942f7044367e78403b3b5c20517ab4cec81f4cfd715b5cee",
        "checked": "2026-10-20",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}