STC89C58RD+40I-PDIP40

{
  "schema_version": 1,
  "type": "component",
  "slug": "stc89c58rd-40i-pdip40",
  "title": "STC89C58RD+40I-PDIP40",
  "brief": "STC Micro Microcontroller Units (MCUs/MPUs/SOCs), DIP-40. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "embedded processors & controllers",
    "stc89c58rd+40i-pdip40",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "STC89C58RD+40I-PDIP40",
    "manufacturer": "STC Micro",
    "package": "DIP-40",
    "pin_count": 40,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontroller Units (MCUs/MPUs/SOCs)",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/5a17a78212f2e06d8b3a80c8c6ebc011.pdf",
    "parts": {
      "symbol": "stc89c58rd-40i-pdip40.kicad_sym",
      "footprint": "stc89c58rd-40i-pdip40.kicad_mod",
      "model_3d": "stc89c58rd-40i-pdip40-hero.glb",
      "model_3d_plain": "stc89c58rd-40i-pdip40-etched.glb",
      "model_3d_step": "stc89c58rd-40i-pdip40-etched.step",
      "model_3d_step_plain": "stc89c58rd-40i-pdip40.step",
      "lbr": "stc89c58rd-40i-pdip40.lbr"
    },
    "distributor_links": {
      "lcsc": "C52838"
    },
    "distributor_check": {
      "checked_at": "2026-10-27T00:42:30Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": null,
        "status": "no match"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "T2/P1.0",
        "type": "bidirectional",
        "description": "P1.0 is a standard quasi-bidirectional I/O (PORT1[0]) that also serves as the Timer/Counter 2 external input T2."
      },
      {
        "number": "2",
        "name": "T2EX/P1.1",
        "type": "bidirectional",
        "description": "P1.1 is a standard I/O (PORT1[1]) that also serves as T2EX, the Timer 2 capture/reload trigger input."
      },
      {
        "number": "3",
        "name": "P1.2",
        "type": "bidirectional",
        "description": "P1.2 is a standard quasi-bidirectional I/O (PORT1[2]) with weak pull-up after reset."
      },
      {
        "number": "4",
        "name": "P1.3",
        "type": "bidirectional",
        "description": "P1.3 is a standard quasi-bidirectional I/O (PORT1[3]) with weak pull-up after reset."
      },
      {
        "number": "5",
        "name": "P1.4",
        "type": "bidirectional",
        "description": "P1.4 is a standard quasi-bidirectional I/O (PORT1[4]) with weak pull-up after reset."
      },
      {
        "number": "6",
        "name": "P1.5",
        "type": "bidirectional",
        "description": "P1.5 is a standard quasi-bidirectional I/O (PORT1[5]) with weak pull-up after reset."
      },
      {
        "number": "7",
        "name": "P1.6",
        "type": "bidirectional",
        "description": "P1.6 is a standard quasi-bidirectional I/O (PORT1[6]) with weak pull-up after reset."
      },
      {
        "number": "8",
        "name": "P1.7",
        "type": "bidirectional",
        "description": "P1.7 is a standard quasi-bidirectional I/O (PORT1[7]) with weak pull-up after reset."
      },
      {
        "number": "9",
        "name": "RST",
        "type": "input",
        "description": "Reset input: holding RST high for at least 24 clock cycles plus 10us resets the MCU, which then starts at address 0000H after RST returns low."
      },
      {
        "number": "10",
        "name": "RxD/P3.0",
        "type": "bidirectional",
        "description": "P3.0 is a standard I/O (PORT3[0]) that also serves as the UART1 serial receive input RxD."
      },
      {
        "number": "11",
        "name": "TxD/P3.1",
        "type": "bidirectional",
        "description": "P3.1 is a standard I/O (PORT3[1]) that also serves as the UART1 serial transmit output TxD."
      },
      {
        "number": "12",
        "name": "INT0/P3.2",
        "type": "bidirectional",
        "description": "P3.2 is a standard I/O (PORT3[2]) that also serves as external interrupt 0 input INT0, selectable as falling-edge or low-level triggered."
      },
      {
        "number": "13",
        "name": "INT1/P3.3",
        "type": "bidirectional",
        "description": "P3.3 is a standard I/O (PORT3[3]) that also serves as external interrupt 1 input INT1, selectable as falling-edge or low-level triggered."
      },
      {
        "number": "14",
        "name": "T0/P3.4",
        "type": "bidirectional",
        "description": "P3.4 is a standard I/O (PORT3[4]) that also serves as the Timer/Counter 0 external input T0."
      },
      {
        "number": "15",
        "name": "T1/P3.5",
        "type": "bidirectional",
        "description": "P3.5 is a standard I/O (PORT3[5]) that also serves as the Timer/Counter 1 external input T1."
      },
      {
        "number": "16",
        "name": "WR/P3.6",
        "type": "bidirectional",
        "description": "P3.6 is a standard I/O (PORT3[6]) that also serves as the external data memory write strobe WR."
      },
      {
        "number": "17",
        "name": "RD/P3.7",
        "type": "bidirectional",
        "description": "P3.7 is a standard I/O (PORT3[7]) that also serves as the external data memory read strobe RD."
      },
      {
        "number": "18",
        "name": "XTAL2",
        "type": "output",
        "description": "Output of the internal clock inverting amplifier for the external crystal; when an external clock is applied to XTAL1, this pin may be left floating."
      },
      {
        "number": "19",
        "name": "XTAL1",
        "type": "input",
        "description": "Input of the internal clock inverting amplifier for the external crystal, or the input for an external clock source."
      },
      {
        "number": "20",
        "name": "Gnd",
        "type": "power_in",
        "description": "Ground (negative power supply) connection."
      },
      {
        "number": "21",
        "name": "P2.0/A8",
        "type": "bidirectional",
        "description": "P2.0 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A8 when external memory is accessed."
      },
      {
        "number": "22",
        "name": "P2.1/A9",
        "type": "bidirectional",
        "description": "P2.1 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A9 when external memory is accessed."
      },
      {
        "number": "23",
        "name": "P2.2/A10",
        "type": "bidirectional",
        "description": "P2.2 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A10 when external memory is accessed."
      },
      {
        "number": "24",
        "name": "P2.3/A11",
        "type": "bidirectional",
        "description": "P2.3 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A11 when external memory is accessed."
      },
      {
        "number": "25",
        "name": "P2.4/A12",
        "type": "bidirectional",
        "description": "P2.4 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A12 when external memory is accessed."
      },
      {
        "number": "26",
        "name": "P2.5/A13",
        "type": "bidirectional",
        "description": "P2.5 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A13 when external memory is accessed."
      },
      {
        "number": "27",
        "name": "P2.6/A14",
        "type": "bidirectional",
        "description": "P2.6 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A14 when external memory is accessed."
      },
      {
        "number": "28",
        "name": "P2.7/A15",
        "type": "bidirectional",
        "description": "P2.7 is a quasi-bidirectional I/O with internal pull-up that also drives address bit A15 when external memory is accessed."
      },
      {
        "number": "29",
        "name": "P4.4/PSEN",
        "type": "bidirectional",
        "description": "On the 90C version this pin is standard I/O P4.4; on the HD version it is PSEN, the external program memory read strobe output."
      },
      {
        "number": "30",
        "name": "P4.5/ALE",
        "type": "bidirectional",
        "description": "On the 90C version this pin is P4.5 and defaults to ALE; on the HD version it is ALE, the address latch enable output (also the programming pulse input)."
      },
      {
        "number": "31",
        "name": "P4.6/EA",
        "type": "input",
        "description": "On the 90C version this pin is standard I/O P4.6; on the HD version it is EA, the internal/external memory select input, which is internally pulled up to Vcc."
      },
      {
        "number": "32",
        "name": "P0.7/AD7",
        "type": "bidirectional",
        "description": "P0.7 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD7 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "33",
        "name": "P0.6/AD6",
        "type": "bidirectional",
        "description": "P0.6 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD6 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "34",
        "name": "P0.5/AD5",
        "type": "bidirectional",
        "description": "P0.5 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD5 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "35",
        "name": "P0.4/AD4",
        "type": "bidirectional",
        "description": "P0.4 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD4 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "36",
        "name": "P0.3/AD3",
        "type": "bidirectional",
        "description": "P0.3 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD3 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "37",
        "name": "P0.2/AD2",
        "type": "bidirectional",
        "description": "P0.2 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD2 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "38",
        "name": "P0.1/AD1",
        "type": "bidirectional",
        "description": "P0.1 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD1 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "39",
        "name": "P0.0/AD0",
        "type": "bidirectional",
        "description": "P0.0 is open-drain after reset and needs a 10K-4.7K pull-up when used as I/O, and carries data/address bit AD0 on the multiplexed bus without an external pull-up."
      },
      {
        "number": "40",
        "name": "Vcc",
        "type": "power_in",
        "description": "Positive power supply connection."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN does not say whether the part is the 90C or HD version. Pins 29, 30 and 31 change function b",
          "1/40 pins cited to the wrong page (name found elsewhere): ['18:XTAL2@p192']"
        ],
        "pages_sent": 134,
        "cost_usd": 0.2013,
        "at": "2026-10-27T00:41:56"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/5a17a78212f2e06d8b3a80c8c6ebc011.pdf",
        "pages": 1691,
        "sha256": "fac7be430b93e2dd",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 40,
        "described": 40,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
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        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "body on z = 0, through-hole leads below",
        "extents_mm": [
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        "zmin_mm": -3.3,
        "centre_offset_mm": 0.127,
        "footprint_binding": "identity",
        "sha256": "114010029e96b840de5e76a4e7f09f46a19e6db723f6d096bd70dbeb8ce0aff9",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
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        "seat": "body on z = 0, through-hole leads below",
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        "footprint_binding": "identity",
        "sha256": "222b7a811e9f5ffdb0801f80fc6b38c091426777aec678de229dd71b0fac7ae2",
        "checked": "2026-10-27",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "STC Micro",
      "Package": "DIP-40",
      "Category": "Embedded Processors & Controllers",
      "Pins": "40"
    },
    "appearance": {
      "housing": {
        "quote": "Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following",
        "page": 320,
        "doc": "ds.pdf",
        "material": "PC"
      },
      "version": 1,
      "datasheet_sha256": "fac7be430b93e2ddd66ecdc0ce66c0e2a97206e31eada3a4cfb7fee9897b466e"
    }
  },
  "variants": [],
  "sections": [
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  "discovery_triggers": [
    "stc89c58rd+40i-pdip40"
  ],
  "discovery_pitch": "STC89C58RD+40I-PDIP40 (STC Micro) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
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  "visibility": {
    "public": true
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}