# STC32G12K64-35I-LQFP32

**STC Micro** · Microcontroller Units (MCUs/MPUs/SOCs) · LQFP-32(7x7)

STC32G12K64-35I-LQFP32 from STC Micro, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.0 | bidirectional | Standard I/O port pin that can also serve as ADC0 input, PWM1P capture/output, or UART2 RxD. |
| 2 | P1.1 | bidirectional | Standard I/O port pin that can also serve as ADC1 input, PWM1N output, or UART2 TxD. |
| 3 | P1.4 | bidirectional | Standard I/O port pin that can also serve as ADC4 input, PWM3P, SPI MISO, or I2C SDA. |
| 4 | P1.5 | bidirectional | Standard I/O port pin that can also serve as ADC5 input, PWM3N, SPI SCLK, or I2C SCL. |
| 5 | P1.6 | bidirectional | Standard I/O port pin that can also serve as ADC6 input, RxD3, PWM4P, master clock output, or external crystal XTALO. |
| 6 | P1.7 | bidirectional | Standard I/O port pin that can also serve as ADC7 input, TxD3, PWM4N, PWM5 I/O, or external crystal/clock input XTALI. |
| 7 | P1.3 | bidirectional | Standard I/O port pin that can also serve as ADC3 input, SPI MOSI, PWM2N output, or Timer2 clock output. |
| 8 | UCAP | passive | USB core power regulator decoupling pin. |
| 9 | P5.4/nRST | bidirectional | Standard I/O port pin by default that can be configured as the active-low reset input nRST, and also serves as ADC2 input and master clock output. |
| 10 | Vcc/AVcc | power_in | Power supply pin for the device (operating voltage 1.9V to 5.5V) and ADC supply. |
| 11 | ADC_VRef+ | input | ADC external reference voltage pin, which must be connected to an external reference between 2.4V and MCU-VCC. |
| 12 | Gnd/AGnd | power_in | Ground pin for digital logic and ADC analog ground. |
| 13 | P3.0/RxD/D-/INT4 | bidirectional | Port pin that after power-on is weak-pull-up quasi-bidirectional and can serve as USB D- data line, UART1 RxD, or external interrupt INT4. |
| 14 | P3.1/TxD/D+ | bidirectional | Port pin that after power-on is weak-pull-up quasi-bidirectional and can serve as USB D+ data line or UART1 TxD. |
| 15 | P3.2/INT0 | bidirectional | Standard I/O port pin that is high level after power-on and is sampled at cold start for USB download mode entry, also serving as external interrupt INT0. |
| 16 | P3.3/INT1 | bidirectional | Standard I/O port pin that can also serve as external interrupt INT1, SPI MISO, I2C SDA, or PWM4N output. |
| 17 | P3.4/T0 | bidirectional | Standard I/O port pin that can also serve as Timer0 external clock input T0, Timer1 clock output, SPI MOSI, or comparator output CMPO. |
| 18 | P3.5/T1 | bidirectional | Standard I/O port pin that can also serve as Timer1 external clock input T1, Timer0 clock output, SPI SS, or PWM fault input PWMFLT. |
| 19 | P3.6/INT2 | bidirectional | Standard I/O port pin that can also serve as external interrupt INT2, UART1 RxD, or comparator negative input CMP-. |
| 20 | P3.7/INT3 | bidirectional | Standard I/O port pin that can also serve as external interrupt INT3, UART2 TxD, or comparator positive input CMP+. |
| 21 | P2.0 | bidirectional | Standard I/O port pin that can also serve as address bus A8, PWM1P, or PWM5 output. |
| 22 | P2.1 | bidirectional | Standard I/O port pin that can also serve as address bus A9, PWM1N, or PWM6 output. |
| 23 | P2.2 | bidirectional | Standard I/O port pin that can also serve as address bus A10, PWM2P, PWM7 output, or SPI SS. |
| 24 | P2.3 | bidirectional | Standard I/O port pin that can also serve as address bus A11, PWM2N, PWM8 output, or SPI MOSI. |
| 25 | P2.4 | bidirectional | Standard I/O port pin that can also serve as address bus A12, PWM3P, I2C SDA, or SPI MISO. |
| 26 | P2.5 | bidirectional | Standard I/O port pin that can also serve as address bus A13, PWM3N, I2C SCL, or SPI SCLK. |
| 27 | P2.6 | bidirectional | Standard I/O port pin that can also serve as address bus A14 or PWM4P output. |
| 28 | P2.7 | bidirectional | Standard I/O port pin that can also serve as address bus A15 or PWM4N output. |
| 29 | P0.0 | bidirectional | Standard I/O port pin that can also serve as address/data bus AD0, ADC8 input, UART3 RxD, or CAN RX. |
| 30 | P0.1 | bidirectional | Standard I/O port pin that can also serve as address/data bus AD1, ADC9 input, UART3 TxD, or CAN TX. |
| 31 | P0.2 | bidirectional | Standard I/O port pin that can also serve as address/data bus AD2, ADC10 input, UART4 RxD, or LIN RX. |
| 32 | P0.3 | bidirectional | Standard I/O port pin that can also serve as address/data bus AD3, ADC11 input, UART4 TxD, or LIN TX. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | LQFP-32(7x7) |
| Category | Single Chip Microcomputer/Microcontroller |
| Pins | 32 |

## CAD (KiCad official)

- Symbol: `STC32G12K64-35I-LQFP32`
- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`
- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files: `stc32g12k64-35i-lqfp32-etched.step` / `stc32g12k64-35i-lqfp32-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stc32g12k64-35i-lqfp32.step` / `stc32g12k64-35i-lqfp32.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STC Micro datasheet](docs/stc32g12k64-35i-lqfp32-datasheet.pdf) (1887 pp, sha256 `59bba1d366cc8d33`, retrieved 2026-10-27, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/stc32g12k64-35i-lqfp32-datasheet.pdf)