component
STC15W4K56S4-30I-LQFP32
Public Made by Adomby adom
STC Micro Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
STC15W4K56S4-30I-LQFP32
STC Micro · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STC15W4K56S4-30I-LQFP32 from STC Micro, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.0 | bidirectional | Standard I/O port 1 bit 0 (quasi-bidirectional with weak pull-up after reset), with alternate functions ADC0 analog input channel 0, CCP1 capture/PWM channel 1 and RxD2 UART2 receive. |
| 2 | P1.1 | bidirectional | Standard I/O port 1 bit 1, with alternate functions ADC1 analog input channel 1, CCP0 capture/PWM channel 0 and TxD2 UART2 transmit. |
| 3 | P1.2 | bidirectional | Standard I/O port 1 bit 2, with alternate functions ADC2 analog input channel 2, SS SPI slave select, ECI external CCP/PCA counter input and CMPO comparator output. |
| 4 | P1.3 | bidirectional | Standard I/O port 1 bit 3, with alternate functions ADC3 analog input channel 3 and MOSI SPI master-out/slave-in. |
| 5 | P1.4 | bidirectional | Standard I/O port 1 bit 4, with alternate functions ADC4 analog input channel 4 and MISO SPI master-in/slave-out. |
| 6 | P1.5 | bidirectional | Standard I/O port 1 bit 5, with alternate functions ADC5 analog input channel 5 and SCLK SPI serial clock. |
| 7 | P1.6 | bidirectional | Standard I/O port 1 bit 6, with alternate functions ADC6 analog input channel 6, RxD_3 UART1 receive, XTAL2 crystal amplifier output (floats when an external clock is used), SysClkO_2 system clock output and PWM6 output (high-impedance input after power-up, must be configured in software before use). |
| 8 | P1.7 | bidirectional | Standard I/O port 1 bit 7, with alternate functions ADC7 analog input channel 7, TxD_3 UART1 transmit, XTAL1 crystal amplifier input (external clock input when an external clock is used) and PWM7 output (high-impedance input after power-up, must be configured in software before use). |
| 9 | P5.4 | bidirectional | Standard I/O port 5 bit 4, with alternate functions RST active-high reset input, SysClkO system clock output, SS_3 SPI slave select and CMP- comparator negative input (must be set to high-impedance input when used as CMP-). |
| 10 | Vcc | power_in | Positive power supply pin; the STC15W4K32S4 series operates from 2.5 V to 5.5 V. |
| 11 | P5.5 | bidirectional | Standard I/O port 5 bit 5, with alternate function CMP+ comparator positive input (must be set to high-impedance input when used as CMP+). |
| 12 | Gnd | power_in | Power supply ground (negative supply) pin. |
| 13 | P3.0 | bidirectional | Standard I/O port 3 bit 0, with alternate functions RxD UART1 receive, INT4 falling-edge-only external interrupt that supports power-down wake-up, and T2CLKO timer 2 clock output; P3.0/P3.1 are also used for download/emulation. |
| 14 | P3.1 | bidirectional | Standard I/O port 3 bit 1, with alternate functions TxD UART1 transmit and T2 timer/counter 2 external input; P3.0/P3.1 are also used for download/emulation. |
| 15 | P3.2 | bidirectional | Standard I/O port 3 bit 2, with alternate function INT0 external interrupt 0 (rising or falling edge depending on IT0; supports power-down wake-up). |
| 16 | P3.3 | bidirectional | Standard I/O port 3 bit 3, with alternate function INT1 external interrupt 1 (rising or falling edge depending on IT1; supports power-down wake-up). |
| 17 | P3.4 | bidirectional | Standard I/O port 3 bit 4, with alternate functions T0 timer/counter 0 external input, T1CLKO timer 1 clock output and ECI_2 CCP/PCA external counter input. |
| 18 | P3.5 | bidirectional | Standard I/O port 3 bit 5, with alternate functions T1 timer/counter 1 external input, T0CLKO timer 0 clock output and CCP0_2 capture/PWM channel 0. |
| 19 | P3.6 | bidirectional | Standard I/O port 3 bit 6, with alternate functions INT2 falling-edge-only external interrupt that supports power-down wake-up, RxD_2 UART1 receive and CCP1_2 capture/PWM channel 1. |
| 20 | P3.7 | bidirectional | Standard I/O port 3 bit 7, with alternate functions INT3 falling-edge-only external interrupt that supports power-down wake-up, TxD_2 UART1 transmit and PWM2 output (high-impedance input after power-up, must be configured in software before use). |
| 21 | P2.0 | bidirectional | Standard I/O port 2 bit 0, with alternate functions A8 address bus bit 8 and RSTOUT_LOW, which outputs low after power-on and during reset and can be set high or low by software. |
| 22 | P2.1 | bidirectional | Standard I/O port 2 bit 1, with alternate functions A9 address bus bit 9, SCLK_2 SPI serial clock and PWM3 output (high-impedance input after power-up, must be configured in software before use). |
| 23 | P2.2 | bidirectional | Standard I/O port 2 bit 2, with alternate functions A10 address bus bit 10, MISO_2 SPI master-in/slave-out and PWM4 output (high-impedance input after power-up, must be configured in software before use). |
| 24 | P2.3 | bidirectional | Standard I/O port 2 bit 3, with alternate functions A11 address bus bit 11, MOSI_2 SPI master-out/slave-in and PWM5 output (high-impedance input after power-up, must be configured in software before use). |
| 25 | P2.4 | bidirectional | Standard I/O port 2 bit 4, with alternate functions A12 address bus bit 12, ECI_3 CCP/PCA external counter input, SS_2 SPI slave select and PWMFLT PWM fault-stop control input. |
| 26 | P2.5 | bidirectional | Standard I/O port 2 bit 5, with alternate functions A13 address bus bit 13 and CCP0_3 capture/PWM channel 0. |
| 27 | P2.6 | bidirectional | Standard I/O port 2 bit 6, with alternate functions A14 address bus bit 14 and CCP1_3 capture/PWM channel 1. |
| 28 | P2.7 | bidirectional | Standard I/O port 2 bit 7, with alternate functions A15 address bus bit 15 and PWM2_2 PWM output channel 2 (high-impedance input after power-up, must be configured in software before use). |
| 29 | P0.0 | bidirectional | Standard I/O port 0 bit 0, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD0 address/data bus and RxD3 UART3 receive. |
| 30 | P0.1 | bidirectional | Standard I/O port 0 bit 1, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD1 address/data bus and TxD3 UART3 transmit. |
| 31 | P0.2 | bidirectional | Standard I/O port 0 bit 2, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD2 address/data bus and RxD4 UART4 receive. |
| 32 | P0.3 | bidirectional | Standard I/O port 0 bit 3, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD3 address/data bus and TxD4 UART4 transmit. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage temperature | TST | -55 | 125 | °C | 1184 | ||
| Operating temperature (I) | TA | -40 | 85 | °C | 1184 | ||
| DC power supply (5V) | VDD - VSS | -0.3 | 5.5 | V | 1184 | ||
| DC power supply (3V) | VDD - VSS | -0.3 | 3.6 | V | 1184 | ||
| Voltage on any pin | -0.3 | V | 1184 | ||||
| VDD Operating Voltage (5V MCU) | VDD | 3.3 | 5 | 5.5 | V | 1184 | |
| Power Down Current (5V MCU) | IPD | 0.1 | uA | 5V | 1184 | ||
| Operating Current (5V MCU) | ICC | 4 | 20 | mA | 5V | 1184 | |
| Input Low (P0,P1,P2,P3) (5V MCU) | VIL1 | 0.8 | V | 5V | 1184 | ||
| Input High (P0,P1,P2,P3) (5V MCU) | VIH1 | 2 | V | 5V | 1184 | ||
| Input High (RESET) (5V MCU) | VIH2 | 2.2 | V | 5V | 1184 | ||
| Sourcing Current for output high, Quasi-output (P0,P1,P2,P3) (5V MCU) | IOH1 | 200 | 270 | uA | 5V | 1184 | |
| Logic 0 input current (P0,P1,P2,P3) (5V MCU) | IIL | 50 | uA | Vpin=0V | 1184 | ||
| Logic 1 to 0 transition current (P0,P1,P2,P3) (5V MCU) | ITL | 100 | 270 | 600 | uA | Vpin=2.0V | 1184 |
| VDD Operating Voltage (3V MCU) | VDD | 2.4 | 3.3 | 3.6 | V | 1184 | |
| Power Down Current (3V MCU) | IPD | 0.1 | uA | 3.3V | 1184 | ||
| Operating Current (3V MCU) | ICC | 4 | 10 | mA | 3.3V | 1184 | |
| Input Low (P0,P1,P2,P3) (3V MCU) | VIL1 | 0.8 | V | 3.3V | 1184 | ||
| Input High (P0,P1,P2,P3) (3V MCU) | VIH1 | 2 | V | 3.3V | 1184 | ||
| Input High (RESET) (3V MCU) | VIH2 | 2.2 | V | 3.3V | 1184 | ||
| Sourcing Current for output high, Quasi-output (P0,P1,P2,P3) (3V MCU) | IOH1 | 140 | 170 | uA | 3.3V | 1184 | |
| Logic 0 input current (P0,P1,P2,P3) (3V MCU) | IIL | 8 | 50 | uA | Vpin=0V | 1184 | |
| Logic 1 to 0 transition current (P0,P1,P2,P3) (3V MCU) | ITL | 110 | 600 | uA | Vpin=2.0V | 1184 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following | 441 |
CAD (KiCad official)
- Symbol:
STC15W4K56S4-30I-LQFP32 - Footprint:
Package_QFP:LQFP-32_7x7mm_P0.8mm - 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files:
stc15w4k56s4-30i-lqfp32-etched.step/stc15w4k56s4-30i-lqfp32-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stc15w4k56s4-30i-lqfp32.step/stc15w4k56s4-30i-lqfp32.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (1219 pp, sha256
cc8c299c891646e0, retrieved 2026-10-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STC15W4K56S4-30I-LQFP32
**STC Micro** · Microcontrollers (MCU/MPU/SOC) · LQFP-32(7x7)
STC15W4K56S4-30I-LQFP32 from STC Micro, in a LQFP-32(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P1.0 | bidirectional | Standard I/O port 1 bit 0 (quasi-bidirectional with weak pull-up after reset), with alternate functions ADC0 analog input channel 0, CCP1 capture/PWM channel 1 and RxD2 UART2 receive. |
| 2 | P1.1 | bidirectional | Standard I/O port 1 bit 1, with alternate functions ADC1 analog input channel 1, CCP0 capture/PWM channel 0 and TxD2 UART2 transmit. |
| 3 | P1.2 | bidirectional | Standard I/O port 1 bit 2, with alternate functions ADC2 analog input channel 2, SS SPI slave select, ECI external CCP/PCA counter input and CMPO comparator output. |
| 4 | P1.3 | bidirectional | Standard I/O port 1 bit 3, with alternate functions ADC3 analog input channel 3 and MOSI SPI master-out/slave-in. |
| 5 | P1.4 | bidirectional | Standard I/O port 1 bit 4, with alternate functions ADC4 analog input channel 4 and MISO SPI master-in/slave-out. |
| 6 | P1.5 | bidirectional | Standard I/O port 1 bit 5, with alternate functions ADC5 analog input channel 5 and SCLK SPI serial clock. |
| 7 | P1.6 | bidirectional | Standard I/O port 1 bit 6, with alternate functions ADC6 analog input channel 6, RxD_3 UART1 receive, XTAL2 crystal amplifier output (floats when an external clock is used), SysClkO_2 system clock output and PWM6 output (high-impedance input after power-up, must be configured in software before use). |
| 8 | P1.7 | bidirectional | Standard I/O port 1 bit 7, with alternate functions ADC7 analog input channel 7, TxD_3 UART1 transmit, XTAL1 crystal amplifier input (external clock input when an external clock is used) and PWM7 output (high-impedance input after power-up, must be configured in software before use). |
| 9 | P5.4 | bidirectional | Standard I/O port 5 bit 4, with alternate functions RST active-high reset input, SysClkO system clock output, SS_3 SPI slave select and CMP- comparator negative input (must be set to high-impedance input when used as CMP-). |
| 10 | Vcc | power_in | Positive power supply pin; the STC15W4K32S4 series operates from 2.5 V to 5.5 V. |
| 11 | P5.5 | bidirectional | Standard I/O port 5 bit 5, with alternate function CMP+ comparator positive input (must be set to high-impedance input when used as CMP+). |
| 12 | Gnd | power_in | Power supply ground (negative supply) pin. |
| 13 | P3.0 | bidirectional | Standard I/O port 3 bit 0, with alternate functions RxD UART1 receive, INT4 falling-edge-only external interrupt that supports power-down wake-up, and T2CLKO timer 2 clock output; P3.0/P3.1 are also used for download/emulation. |
| 14 | P3.1 | bidirectional | Standard I/O port 3 bit 1, with alternate functions TxD UART1 transmit and T2 timer/counter 2 external input; P3.0/P3.1 are also used for download/emulation. |
| 15 | P3.2 | bidirectional | Standard I/O port 3 bit 2, with alternate function INT0 external interrupt 0 (rising or falling edge depending on IT0; supports power-down wake-up). |
| 16 | P3.3 | bidirectional | Standard I/O port 3 bit 3, with alternate function INT1 external interrupt 1 (rising or falling edge depending on IT1; supports power-down wake-up). |
| 17 | P3.4 | bidirectional | Standard I/O port 3 bit 4, with alternate functions T0 timer/counter 0 external input, T1CLKO timer 1 clock output and ECI_2 CCP/PCA external counter input. |
| 18 | P3.5 | bidirectional | Standard I/O port 3 bit 5, with alternate functions T1 timer/counter 1 external input, T0CLKO timer 0 clock output and CCP0_2 capture/PWM channel 0. |
| 19 | P3.6 | bidirectional | Standard I/O port 3 bit 6, with alternate functions INT2 falling-edge-only external interrupt that supports power-down wake-up, RxD_2 UART1 receive and CCP1_2 capture/PWM channel 1. |
| 20 | P3.7 | bidirectional | Standard I/O port 3 bit 7, with alternate functions INT3 falling-edge-only external interrupt that supports power-down wake-up, TxD_2 UART1 transmit and PWM2 output (high-impedance input after power-up, must be configured in software before use). |
| 21 | P2.0 | bidirectional | Standard I/O port 2 bit 0, with alternate functions A8 address bus bit 8 and RSTOUT_LOW, which outputs low after power-on and during reset and can be set high or low by software. |
| 22 | P2.1 | bidirectional | Standard I/O port 2 bit 1, with alternate functions A9 address bus bit 9, SCLK_2 SPI serial clock and PWM3 output (high-impedance input after power-up, must be configured in software before use). |
| 23 | P2.2 | bidirectional | Standard I/O port 2 bit 2, with alternate functions A10 address bus bit 10, MISO_2 SPI master-in/slave-out and PWM4 output (high-impedance input after power-up, must be configured in software before use). |
| 24 | P2.3 | bidirectional | Standard I/O port 2 bit 3, with alternate functions A11 address bus bit 11, MOSI_2 SPI master-out/slave-in and PWM5 output (high-impedance input after power-up, must be configured in software before use). |
| 25 | P2.4 | bidirectional | Standard I/O port 2 bit 4, with alternate functions A12 address bus bit 12, ECI_3 CCP/PCA external counter input, SS_2 SPI slave select and PWMFLT PWM fault-stop control input. |
| 26 | P2.5 | bidirectional | Standard I/O port 2 bit 5, with alternate functions A13 address bus bit 13 and CCP0_3 capture/PWM channel 0. |
| 27 | P2.6 | bidirectional | Standard I/O port 2 bit 6, with alternate functions A14 address bus bit 14 and CCP1_3 capture/PWM channel 1. |
| 28 | P2.7 | bidirectional | Standard I/O port 2 bit 7, with alternate functions A15 address bus bit 15 and PWM2_2 PWM output channel 2 (high-impedance input after power-up, must be configured in software before use). |
| 29 | P0.0 | bidirectional | Standard I/O port 0 bit 0, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD0 address/data bus and RxD3 UART3 receive. |
| 30 | P0.1 | bidirectional | Standard I/O port 0 bit 1, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD1 address/data bus and TxD3 UART3 transmit. |
| 31 | P0.2 | bidirectional | Standard I/O port 0 bit 2, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD2 address/data bus and RxD4 UART4 receive. |
| 32 | P0.3 | bidirectional | Standard I/O port 0 bit 3, configurable as quasi-bidirectional/weak pull-up (default after reset), push-pull, high-impedance input or open-drain, with alternate functions AD3 address/data bus and TxD4 UART4 transmit. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | LQFP-32(7x7) |
| Category | Embedded Processors & Controllers |
| Pins | 32 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage temperature | TST | -55 | | 125 | °C | | 1184 |
| Operating temperature (I) | TA | -40 | | 85 | °C | | 1184 |
| DC power supply (5V) | VDD - VSS | -0.3 | | 5.5 | V | | 1184 |
| DC power supply (3V) | VDD - VSS | -0.3 | | 3.6 | V | | 1184 |
| Voltage on any pin | | -0.3 | | | V | | 1184 |
| VDD Operating Voltage (5V MCU) | VDD | 3.3 | 5 | 5.5 | V | | 1184 |
| Power Down Current (5V MCU) | IPD | | | 0.1 | uA | 5V | 1184 |
| Operating Current (5V MCU) | ICC | | 4 | 20 | mA | 5V | 1184 |
| Input Low (P0,P1,P2,P3) (5V MCU) | VIL1 | | | 0.8 | V | 5V | 1184 |
| Input High (P0,P1,P2,P3) (5V MCU) | VIH1 | 2 | | | V | 5V | 1184 |
| Input High (RESET) (5V MCU) | VIH2 | 2.2 | | | V | 5V | 1184 |
| Sourcing Current for output high, Quasi-output (P0,P1,P2,P3) (5V MCU) | IOH1 | 200 | 270 | | uA | 5V | 1184 |
| Logic 0 input current (P0,P1,P2,P3) (5V MCU) | IIL | | | 50 | uA | Vpin=0V | 1184 |
| Logic 1 to 0 transition current (P0,P1,P2,P3) (5V MCU) | ITL | 100 | 270 | 600 | uA | Vpin=2.0V | 1184 |
| VDD Operating Voltage (3V MCU) | VDD | 2.4 | 3.3 | 3.6 | V | | 1184 |
| Power Down Current (3V MCU) | IPD | | | 0.1 | uA | 3.3V | 1184 |
| Operating Current (3V MCU) | ICC | | 4 | 10 | mA | 3.3V | 1184 |
| Input Low (P0,P1,P2,P3) (3V MCU) | VIL1 | | | 0.8 | V | 3.3V | 1184 |
| Input High (P0,P1,P2,P3) (3V MCU) | VIH1 | 2 | | | V | 3.3V | 1184 |
| Input High (RESET) (3V MCU) | VIH2 | 2.2 | | | V | 3.3V | 1184 |
| Sourcing Current for output high, Quasi-output (P0,P1,P2,P3) (3V MCU) | IOH1 | 140 | 170 | | uA | 3.3V | 1184 |
| Logic 0 input current (P0,P1,P2,P3) (3V MCU) | IIL | | 8 | 50 | uA | Vpin=0V | 1184 |
| Logic 1 to 0 transition current (P0,P1,P2,P3) (3V MCU) | ITL | | 110 | 600 | uA | Vpin=2.0V | 1184 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following | 441 |
## CAD (KiCad official)
- Symbol: `STC15W4K56S4-30I-LQFP32`
- Footprint: `Package_QFP:LQFP-32_7x7mm_P0.8mm`
- 3D model: LQFP-32(7x7) (KiCad packages3D, STEP)
- 3D model files: `stc15w4k56s4-30i-lqfp32-etched.step` / `stc15w4k56s4-30i-lqfp32-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stc15w4k56s4-30i-lqfp32.step` / `stc15w4k56s4-30i-lqfp32.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STC Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8609193203551780864) (1219 pp, sha256 `cc8c299c891646e0`, retrieved 2026-10-17, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stc15w4k56s4-30i-lqfp32-datasheet.pdf)