STC15L2K32S2-28I-LQFP32

{
  "slug": "stc15l2k32s2-28i-lqfp32",
  "version": "0.1.0",
  "type": "component",
  "description": "STC Micro Microcontrollers (MCU/MPU/SOC), LQFP-32(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "embedded processors & controllers",
    "stc15l2k32s2-28i-lqfp32",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
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    "path": "docs/hero.png"
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    "stc15l2k32s2-28i-lqfp32.glb",
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  "component": {
    "mpn": "STC15L2K32S2-28I-LQFP32",
    "manufacturer": "STC Micro",
    "package": "LQFP-32(7x7)",
    "pin_count": 32,
    "category": "Embedded Processors & Controllers",
    "subcategory": "Microcontrollers (MCU/MPU/SOC)",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172177259368448",
    "parts": {
      "symbol": "stc15l2k32s2-28i-lqfp32.kicad_sym",
      "footprint": "stc15l2k32s2-28i-lqfp32.kicad_mod",
      "model_3d": "stc15l2k32s2-28i-lqfp32-hero.glb",
      "model_3d_plain": "stc15l2k32s2-28i-lqfp32-etched.glb",
      "model_3d_step": "stc15l2k32s2-28i-lqfp32-etched.step",
      "model_3d_step_plain": "stc15l2k32s2-28i-lqfp32.step",
      "lbr": "stc15l2k32s2-28i-lqfp32.lbr"
    },
    "distributor_links": {
      "lcsc": "C22478"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T07:52:24Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "P1.0/ADC0/CCP1/RxD2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.0 (PORT1[0]) with alternate functions ADC input channel 0, CCP1 capture/compare/PWM channel 1, and UART2 receive RxD2."
      },
      {
        "number": "2",
        "name": "P1.1/ADC1/CCP0/TxD2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.1 (PORT1[1]) with alternate functions ADC input channel 1, CCP0 capture/compare/PWM channel 0, and UART2 transmit TxD2."
      },
      {
        "number": "3",
        "name": "P1.2/ADC2/SS/ECI",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.2 (PORT1[2]) with alternate functions ADC input channel 2, SPI slave select SS, and CCP/PCA external counter pulse input ECI."
      },
      {
        "number": "4",
        "name": "P1.3/ADC3/MOSI",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.3 (PORT1[3]) with alternate functions ADC input channel 3 and SPI master-out/slave-in MOSI."
      },
      {
        "number": "5",
        "name": "P1.4/ADC4/MISO",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.4 (PORT1[4]) with alternate functions ADC input channel 4 and SPI master-in/slave-out MISO."
      },
      {
        "number": "6",
        "name": "P1.5/ADC5/SCLK",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.5 (PORT1[5]) with alternate functions ADC input channel 5 and SPI serial clock SCLK."
      },
      {
        "number": "7",
        "name": "P1.6/ADC6/RxD_3/XTAL2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.6 (PORT1[6]) with alternate functions ADC input channel 6, UART1 receive RxD_3, and XTAL2 (inverting amplifier output for an external crystal; may float when an external clock drives XTAL1)."
      },
      {
        "number": "8",
        "name": "P1.7/ADC7/TxD_3/XTAL1",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P1.7 (PORT1[7]) with alternate functions ADC input channel 7, UART1 transmit TxD_3, and XTAL1 (inverting amplifier input for an external crystal, or external clock source input when no crystal is used)."
      },
      {
        "number": "9",
        "name": "P5.4/RST/MCLKO/SS_3",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P5.4 (PORT5[4]) which is I/O by default out of the factory; it can be set via STC-ISP as RST reset input (high-level reset) or used for MCLKO master clock output (MCLK/1, /2, /4) or SPI slave select SS_3."
      },
      {
        "number": "10",
        "name": "Vcc",
        "type": "power_in",
        "description": "Positive power supply; the STC15L2K series operates from 2.4 V to 3.6 V."
      },
      {
        "number": "11",
        "name": "P5.5",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P5.5 (PORT5[5]) with no alternate function listed for the LQFP32 package."
      },
      {
        "number": "12",
        "name": "Gnd",
        "type": "power_in",
        "description": "Power supply negative terminal, connected to ground."
      },
      {
        "number": "13",
        "name": "P3.0/RxD/INT4/T2CLKO",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.0 (PORT3[0]) with alternate functions UART1 receive RxD, external interrupt INT4 (falling edge only, supports power-down wake-up), and Timer 2 clock output T2CLKO."
      },
      {
        "number": "14",
        "name": "P3.1/TxD/T2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.1 (PORT3[1]) with alternate functions UART1 transmit TxD and external input of Timer/Counter 2 (T2)."
      },
      {
        "number": "15",
        "name": "P3.2/INT0",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.2 (PORT3[2]) with external interrupt INT0, which is rising/falling-edge capable (falling edge only if IT0 is set) and supports power-down wake-up."
      },
      {
        "number": "16",
        "name": "P3.3/INT1",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.3 (PORT3[3]) with external interrupt INT1, which is rising/falling-edge capable (falling edge only if IT1 is set) and supports power-down wake-up."
      },
      {
        "number": "17",
        "name": "P3.4/T0/T1CLKO/ECI_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.4 (PORT3[4]) with alternate functions Timer 0 external input T0, Timer 1 clock output T1CLKO, and CCP/PCA external pulse input ECI_2."
      },
      {
        "number": "18",
        "name": "P3.5/T1/T0CLKO/CCP0_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.5 (PORT3[5]) with alternate functions Timer 1 external input T1, Timer 0 clock output T0CLKO, and CCP0 channel on CCP0_2."
      },
      {
        "number": "19",
        "name": "P3.6/INT2/RxD_2/CCP1_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.6 (PORT3[6]) with alternate functions external interrupt INT2 (falling edge only, supports power-down wake-up), UART1 receive RxD_2, and CCP1 channel on CCP1_2."
      },
      {
        "number": "20",
        "name": "P3.7/INT3/TxD_2/CCP2/CCP2_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P3.7 (PORT3[7]) with alternate functions external interrupt INT3 (falling edge only, supports power-down wake-up), UART1 transmit TxD_2, and CCP2 channel on CCP2/CCP2_2."
      },
      {
        "number": "21",
        "name": "P2.0/A8/RSTOUT_LOW",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.0 (PORT2[0]) with address bus bit A8 for external memory and RSTOUT_LOW, which outputs low during power-up and reset."
      },
      {
        "number": "22",
        "name": "P2.1/A9/SCLK_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.1 (PORT2[1]) with address bus bit A9 for external memory and SPI serial clock SCLK_2."
      },
      {
        "number": "23",
        "name": "P2.2/A10/MISO_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.2 (PORT2[2]) with address bus bit A10 for external memory and SPI master-in/slave-out MISO_2."
      },
      {
        "number": "24",
        "name": "P2.3/A11/MOSI_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.3 (PORT2[3]) with address bus bit A11 for external memory and SPI master-out/slave-in MOSI_2."
      },
      {
        "number": "25",
        "name": "P2.4/A12/ECI_3/SS_2",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.4 (PORT2[4]) with address bus bit A12 for external memory, CCP/PCA external pulse input ECI_3, and SPI slave select SS_2."
      },
      {
        "number": "26",
        "name": "P2.5/A13/CCP0_3",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.5 (PORT2[5]) with address bus bit A13 for external memory and CCP0 capture/compare/PWM channel on CCP0_3."
      },
      {
        "number": "27",
        "name": "P2.6/A14/CCP1_3",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.6 (PORT2[6]) with address bus bit A14 for external memory and CCP1 capture/compare/PWM channel on CCP1_3."
      },
      {
        "number": "28",
        "name": "P2.7/A15/CCP2_3",
        "type": "bidirectional",
        "description": "Standard bidirectional I/O port P2.7 (PORT2[7]) with address bus bit A15 for external memory and CCP2 capture/compare/PWM channel on CCP2_3."
      },
      {
        "number": "29",
        "name": "P0.0/AD0",
        "type": "bidirectional",
        "description": "Port P0.0 (PORT0[0]) can be configured as quasi-bidirectional with weak pull-up (default after reset), push-pull, input-only or open-drain, and is the AD0 low address/data bus bit when the external bus is used."
      },
      {
        "number": "30",
        "name": "P0.1/AD1",
        "type": "bidirectional",
        "description": "Port P0.1 (PORT0[1]) can be configured as quasi-bidirectional with weak pull-up (default after reset), push-pull, input-only or open-drain, and is the AD1 low address/data bus bit when the external bus is used."
      },
      {
        "number": "31",
        "name": "P0.2/AD2",
        "type": "bidirectional",
        "description": "Port P0.2 (PORT0[2]) can be configured as quasi-bidirectional with weak pull-up (default after reset), push-pull, input-only or open-drain, and is the AD2 low address/data bus bit when the external bus is used."
      },
      {
        "number": "32",
        "name": "P0.3/AD3",
        "type": "bidirectional",
        "description": "Port P0.3 (PORT0[3]) can be configured as quasi-bidirectional with weak pull-up (default after reset), push-pull, input-only or open-drain, and is the AD3 low address/data bus bit when the external bus is used."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The package hint says LQFP-32(7x7), but the datasheet lists the LQFP32 package as 9x9mm (LQFP32(9x9m; The datasheet is the STC15F2K60S2 / STC15L2K60S2 family manual. STC15L2K32S2 is listed in its family; Pin 9 (P5.4) is I/O by default and only becomes the RST reset input if set through the STC-ISP progr"
        ],
        "pages_sent": 139,
        "cost_usd": 1.0904,
        "at": "2026-10-18T07:51:55"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586172177259368448",
        "pages": 1097,
        "sha256": "8b798668f36be5ce",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 32,
        "described": 32,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
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        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
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        "footprint_binding": "identity",
        "sha256": "be0e412f1c66fee70039b0e109e0cc7c823161dda97593718afa97569bc61ce3",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
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        "sha256": "5905f24b8e1a8bdfa7c3d409a111f519bc7ee8c01a8d9f42a44fdef22784afab",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}