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STC15H2K64S4-36I-SOP28
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STC Micro Microcontrollers (MCU/MPU/SOC), SOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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STC15H2K64S4-36I-SOP28
STC Micro · Microcontrollers (MCU/MPU/SOC) · SOP-28
STC15H2K64S4-36I-SOP28 from STC Micro, in a SOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P2.6/PWM26/A14/CCP1_3 | bidirectional | General-purpose I/O P2.6 (alternates PWM26, CCP1_3, A14) that powers up as a high-impedance input and must have its mode set before use. |
| 2 | P2.7/PWM27/A15/CCP2_3 | bidirectional | General-purpose I/O P2.7 (alternates PWM27, CCP2_3, A15) that powers up as a high-impedance input and must have its mode set before use. |
| 3 | P1.0 | bidirectional | General-purpose I/O P1.0 (alternates UART2 RxD2, CCP1, ADC channel 0, PWM10) that powers up as a high-impedance input and must have its mode set before use. |
| 4 | P1.1 | bidirectional | General-purpose I/O P1.1 (alternates UART2 TxD2, CCP0, ADC channel 1, PWM11) that powers up as a high-impedance input and must have its mode set before use. |
| 5 | P1.2 | bidirectional | General-purpose I/O P1.2 (alternates Timer 2 external count input T2, SPI SS, ECI, ADC channel 2, PWM12) that powers up as a high-impedance input and must have its mode set before use. |
| 6 | P1.3 | bidirectional | General-purpose I/O P1.3 (alternates T2CLKO, SPI MOSI, ADC channel 3, PWM13) that powers up as a high-impedance input and must have its mode set before use. |
| 7 | P1.4 | bidirectional | General-purpose I/O P1.4 (alternates I2C SDA, SPI MISO, ADC channel 4, PWM14) that powers up as a high-impedance input and can also wake the MCU from power-down via I2C SDA falling edge. |
| 8 | P1.5 | bidirectional | General-purpose I/O P1.5 (alternates I2C SCL, SPI SCLK, ADC channel 5, PWM15) that powers up as a high-impedance input and must have its mode set before use. |
| 9 | P1.6 | bidirectional | General-purpose I/O P1.6 that serves as XTALO crystal output when a crystal is used, and is fixed as a high-impedance input when external clock mode (XITYPE=0) is selected. |
| 10 | P1.7 | bidirectional | General-purpose I/O P1.7 that serves as XTALI crystal or external clock input when the external oscillator is enabled, and otherwise is available as ADC channel 7 or PWM17. |
| 11 | P5.4 | bidirectional | P5.4 is a general-purpose I/O by default and becomes an active-low reset input (nRST) when the RST pin function is selected in RSTCFG; in reset mode its internal 4K pull-up stays enabled, while as I/O its pull-up is on for about 6.5 ms after power-up. |
| 12 | Vcc/AVcc/ADC_VRef+ | power_in | Main MCU supply (Vcc, also AVcc and ADC_VRef+); the datasheet gives an operating range of 1.9 V to 5.5 V, and ADC_VRef+ must be tied to an external reference of 2.4 V to MCU-VCC or directly to VCC, never left floating. |
| 13 | P5.2 | bidirectional | General-purpose I/O P5.2 (alternates UART4 RxD4_2 and PWM52) that powers up as a high-impedance input and must have its mode set before use. |
| 14 | Gnd/AGnd | power_in | Ground reference for the digital core and analog ground (AGnd); the datasheet requires the ADC analog ground to be connected to system ground with a short, thick trace. |
| 15 | P3.0/PWM30/RxD/INT4 | bidirectional | General-purpose I/O P3.0 (alternates UART1 RxD, PWM30, INT4 falling-edge interrupt) that powers up in weak-pull-up quasi-bidirectional mode and is used with P3.1/P3.2 for USB ISP boot selection, so these three pins must not all be low at power-up if user code is to run. |
| 16 | P3.1/PWM31/TxD | bidirectional | General-purpose I/O P3.1 (alternates UART1 TxD and PWM31) that powers up in weak-pull-up quasi-bidirectional mode and is part of the ISP download/emulation interface. |
| 17 | P3.2/PWM32/INT0/SCLK_4/I2CSCL_4 | bidirectional | General-purpose I/O P3.2 (alternates external interrupt INT0 with rising/falling edge support, PWM32, SCLK_4, I2C SCL_4) that powers up as a high-impedance input and is part of the USB ISP boot-selection check at power-up. |
| 18 | P3.3/PWM33/INT1/MISO_4/I2CSDA_4 | bidirectional | General-purpose I/O P3.3 (alternates external interrupt INT1 with rising/falling edge support, PWM33, MISO_4, I2C SDA_4) that powers up as a high-impedance input and must have its mode set before use. |
| 19 | P3.4/PWM34/T0/T1CLKO/ECI_2/MOSI_4/CMPO | bidirectional | General-purpose I/O P3.4 (alternates Timer 0 external input T0, T1CLKO, ECI_2, MOSI_4, comparator output CMPO, PWM34) that powers up as a high-impedance input and must have its mode set before use. |
| 20 | P3.5/PWM35/T1/T0CLKO/SS_4/CCP0_2/PWMFLT | bidirectional | General-purpose I/O P3.5 (alternates Timer 1 external input T1, T0CLKO, SS_4, CCP0_2, PWMFLT, PWM35) that powers up as a high-impedance input and must have its mode set before use. |
| 21 | P3.6/PWM36/INT2/RxD_2/CMP-/CCP1_2 | bidirectional | General-purpose I/O P3.6 (alternates external interrupt INT2 falling-edge only, UART2 RxD_2, comparator input CMP-, CCP1_2, PWM36) that powers up as a high-impedance input and must have its mode set before use. |
| 22 | P3.7/PWM37/INT3/TxD_2/CMP+/CCP2_2/CCP2 | bidirectional | General-purpose I/O P3.7 (alternates external interrupt INT3 falling-edge only, UART2 TxD_2, comparator input CMP+, CCP2_2, CCP2, PWM37) that powers up as a high-impedance input and must have its mode set before use. |
| 23 | P2.0/PWM20/A8 | bidirectional | General-purpose I/O P2.0 (alternates PWM20 and address bit A8) that powers up as a high-impedance input and must have its mode set before use. |
| 24 | P2.1/PWM21/A9 | bidirectional | General-purpose I/O P2.1 (alternates PWM21 and address bit A9) that powers up as a high-impedance input and must have its mode set before use. |
| 25 | P2.2/PWM22/A10/SS_2 | bidirectional | General-purpose I/O P2.2 (alternates PWM22, address bit A10, SPI SS_2) that powers up as a high-impedance input and must have its mode set before use. |
| 26 | P2.3/PWM23/A11/MOSI_2 | bidirectional | General-purpose I/O P2.3 (alternates PWM23, address bit A11, SPI MOSI_2) that powers up as a high-impedance input and must have its mode set before use. |
| 27 | P2.4/PWM24/A12/ECI_3/I2CSDA_2/MISO_2 | bidirectional | General-purpose I/O P2.4 (alternates PWM24, address bit A12, ECI_3, I2C SDA_2, SPI MISO_2) that powers up as a high-impedance input and must have its mode set before use. |
| 28 | P2.5/PWM25/A13/CCP0_3/I2CSCL_2/SCLK_2 | bidirectional | General-purpose I/O P2.5 (alternates PWM25, address bit A13, CCP0_3, I2C SCL_2, SPI SCLK_2) that powers up as a high-impedance input and must have its mode set before use. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | SOP-28 |
| Category | Embedded Processors & Controllers |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input low voltage (Schmitt trigger open) | VIL1 | 0.99 | V | 打开施密特触发 | 866 | ||
| Input low voltage (Schmitt trigger closed) | VIL1 | 1.07 | V | 关闭施密特触发 | 866 | ||
| Input high voltage, normal I/O (Schmitt trigger open) | VIH1 | 1.18 | V | 打开施密特触发 | 866 | ||
| Input high voltage, normal I/O (Schmitt trigger closed) | VIH1 | 1.09 | V | 关闭施密特触发 | 866 | ||
| Input high voltage, reset pin (as printed) | VIH2 | 1.18 | 0.99 | V | 866 | ||
| Logic 1 to 0 transition current | ITL | 100 | 270 | 600 | uA | 端口电压 2.0V | 866 |
| Logic 0 input current | IIL | 50 | uA | 端口电压 0V | 866 | ||
| High-level output current, bidirectional mode | IOH1 | 200 | 270 | uA | 866 | ||
| I/O port pull-up resistor | RPU | 5.8 | 5.9 | 6 | KΩ | 866 | |
| Storage temperature | -55 | 150 | ℃ | 865 | |||
| Operating temperature | -40 | 85 | ℃ | 865 | |||
| Operating voltage | 1.9 | 5.5 | V | 865 | |||
| VDD to ground voltage | -0.3 | 5.5 | V | 865 | |||
| I/O port to ground voltage | -0.3 | V | 865 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the following | 395 |
CAD (KiCad official)
- Symbol:
STC15H2K64S4-36I-SOP28 - Footprint:
Package_SO:SOP-28_8.4x18.16mm_P1.27mm - 3D model: SOP-28 (KiCad packages3D, STEP)
- 3D model files:
stc15h2k64s4-36i-sop28-etched.step/stc15h2k64s4-36i-sop28-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stc15h2k64s4-36i-sop28.step/stc15h2k64s4-36i-sop28.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (1003 pp, sha256
eceec044fae19745, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).