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STC15F2K60S2-28I-SOP28
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STC Micro Microcontroller Units (MCUs/MPUs/SOCs), SOP-28-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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STC15F2K60S2-28I-SOP28
STC Micro · Microcontroller Units (MCUs/MPUs/SOCs) · SOP-28-300mil
STC15F2K60S2-28I-SOP28 from STC Micro, in a SOP-28-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | P2.6/CCP1_3 | bidirectional | Standard I/O PORT2[6] (A14 address bit in the 44/40-pin parts) that can also serve as CCP channel 1 for capture, high-speed pulse output or PWM output when CCP is switched to the P2 group. |
| 2 | P2.7/CCP2_3 | bidirectional | Standard I/O PORT2[7] (A15 address bit in the 44/40-pin parts) that can also serve as CCP channel 2 for capture, high-speed pulse output or PWM output when CCP is switched to the P2 group. |
| 3 | P1.0/ADC0/CCP1/RxD2 | bidirectional | Standard I/O PORT1[0] that doubles as ADC input channel 0, CCP channel 1 (capture, high-speed pulse or PWM output) and the UART2 receive pin RxD2. |
| 4 | P1.1/ADC1/CCP0/TxD2 | bidirectional | Standard I/O PORT1[1] that doubles as ADC input channel 1, CCP channel 0 (capture, high-speed pulse or PWM output) and the UART2 transmit pin TxD2. |
| 5 | P1.2/ADC2/SS/ECI | bidirectional | Standard I/O PORT1[2] that doubles as ADC input channel 2, the SPI slave-select signal SS and the external pulse input ECI of the CCP/PCA counter. |
| 6 | P1.3/ADC3/MOSI | bidirectional | Standard I/O PORT1[3] that doubles as ADC input channel 3 and the SPI master-out slave-in line MOSI. |
| 7 | P1.4/ADC4/MISO | bidirectional | Standard I/O PORT1[4] that doubles as ADC input channel 4 and the SPI master-in slave-out line MISO. |
| 8 | P1.5/ADC5/SCLK | bidirectional | Standard I/O PORT1[5] that doubles as ADC input channel 5 and the SPI clock signal SCLK. |
| 9 | P1.6/ADC6/RxD_3/XTAL2 | bidirectional | Standard I/O PORT1[6] that doubles as ADC input channel 6, UART1 receive RxD_3 and XTAL2, the inverting amplifier output for an external crystal (it can float when an external clock is fed to XTAL1). |
| 10 | P1.7/ADC7/TxD_3/XTAL1 | bidirectional | Standard I/O PORT1[7] that doubles as ADC input channel 7, UART1 transmit TxD_3 and XTAL1, the inverting amplifier input for an external crystal or the input for an external clock source. |
| 11 | P5.4/RST/MCLKO/SS_3 | bidirectional | Standard I/O PORT5[4] that can be set in STC-ISP as the active-high reset pin RST, and also outputs the main clock MCLKO (MCLK/1, /2 or /4) or serves as SPI slave-select SS_3. |
| 12 | Vcc | power_in | Positive power supply pin; the STC15F2K60S2 series operates from 5.5V to 4.2V. |
| 13 | P5.5 | bidirectional | Standard I/O PORT5[5]. |
| 14 | Gnd | power_in | Negative power supply pin, connected to ground. |
| 15 | P3.0/RxD/INT4/T2CLKO | bidirectional | Standard I/O PORT3[0] that doubles as UART1 receive RxD, falling-edge-only external interrupt INT4 (supports power-down wake-up) and the Timer 2 clock output T2CLKO. |
| 16 | P3.1/TxD/T2 | bidirectional | Standard I/O PORT3[1] that doubles as UART1 transmit TxD and the external input of timer/counter 2. |
| 17 | P3.2/INT0 | bidirectional | Standard I/O PORT3[2] that doubles as external interrupt INT0, which is falling-edge only when IT0 (TCON.0)=1 and rising or falling edge when IT0=0, and supports power-down wake-up. |
| 18 | P3.3/INT1 | bidirectional | Standard I/O PORT3[3] that doubles as external interrupt INT1, which is falling-edge only when IT1 (TCON.2)=1 and rising or falling edge when IT1=0, and supports power-down wake-up. |
| 19 | P3.4/T0/T1CLKO/ECI_2 | bidirectional | Standard I/O PORT3[4] that doubles as the external input of timer/counter 0, the Timer 1 clock output T1CLKO and the CCP/PCA counter external pulse input ECI_2. |
| 20 | P3.5/T1/T0CLKO/CCP0_2 | bidirectional | Standard I/O PORT3[5] that doubles as the external input of timer/counter 1, the Timer 0 clock output T0CLKO and CCP channel 0 (CCP0_2) for capture, high-speed pulse or PWM output. |
| 21 | P3.6/INT2/RxD_2/CCP1_2 | bidirectional | Standard I/O PORT3[6] that doubles as falling-edge-only external interrupt INT2 (supports power-down wake-up), UART1 receive RxD_2 and CCP channel 1 (CCP1_2). |
| 22 | P3.7/INT3/TxD_2/CCP2/CCP2_2 | bidirectional | Standard I/O PORT3[7] that doubles as falling-edge-only external interrupt INT3 (supports power-down wake-up), UART1 transmit TxD_2 and CCP channel 2 (CCP2/CCP2_2). |
| 23 | P2.0/RSTOUT_LOW | bidirectional | Standard I/O PORT2[0] whose RSTOUT_LOW function outputs low after power-up and during reset, and can then be set high or low by software (set it high before reading an external level). |
| 24 | P2.1/SCLK_2 | bidirectional | Standard I/O PORT2[1] that doubles as the SPI clock signal SCLK_2. |
| 25 | P2.2/MISO_2 | bidirectional | Standard I/O PORT2[2] that doubles as the SPI master-in slave-out line MISO_2. |
| 26 | P2.3/MOSI_2 | bidirectional | Standard I/O PORT2[3] that doubles as the SPI master-out slave-in line MOSI_2. |
| 27 | P2.4/ECI_3/SS_2 | bidirectional | Standard I/O PORT2[4] that doubles as the CCP/PCA counter external pulse input ECI_3 and the SPI slave-select signal SS_2. |
| 28 | P2.5/CCP0_3 | bidirectional | Standard I/O PORT2[5] that can also serve as CCP channel 0 for capture, high-speed pulse output or PWM output when CCP is switched to the P2 group. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | SOP-28-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 28 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Storage temperature | TST | -55 | 125 | ℃ | 1177 | ||
| Operating temperature (I) | TA | -40 | 85 | ℃ | 1177 | ||
| DC power supply (5V) | VDD - VSS | -0.3 | 5.5 | V | 1177 | ||
| Voltage on any pin | -0.3 | V | 1177 | ||||
| Operating Voltage | VDD | 3.3 | 5 | 5.5 | V | 1177 | |
| Input Low (P0,P1,P2,P3) | VIL1 | 0.8 | V | 5V | 1177 | ||
| Input High (P0,P1,P2,P3) | VIH1 | 2 | V | 5V | 1177 | ||
| Input High (RESET) | VIH2 | 2.2 | V | 5V | 1177 | ||
| Sourcing Current for output high (P0,P1,P2,P3) (Quasi-output) | IOH1 | 200 | 270 | uA | 5V | 1177 | |
| Logic 0 input current (P0,P1,P2,P3) | IIL | 50 | uA | Vpin=0V | 1177 | ||
| Logic 1 to 0 transition current (P0,P1,P2,P3) | ITL | 100 | 270 | 600 | uA | Vpin=2.0V | 1177 |
| Operating Current | ICC | 4 | 20 | mA | 5V | 1177 | |
| Idle Current | IIDL | 3 | mA | 5V | 1177 | ||
| Sink Current for output low (P0,P1,P2,P3) | IOL1 | 20 | mA | 5V@Vpin=0.45V | 1177 | ||
| Sourcing Current for output high (P0,P1,P2,P3) (Push-Pull, Strong-output) | IOH2 | 20 | mA | 5V | 1177 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the | 434 |
CAD (KiCad official)
- Symbol:
STC15F2K60S2-28I-SOP28 - Footprint:
Package_SO:SOP-28_8.4x18.16mm_P1.27mm - 3D model: SOP-28-300mil (KiCad packages3D, STEP)
- 3D model files:
stc15f2k60s2-28i-sop28-etched.step/stc15f2k60s2-28i-sop28-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stc15f2k60s2-28i-sop28.step/stc15f2k60s2-28i-sop28.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (1243 pp, sha256
52dd74947fde071e, retrieved 2026-10-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).