component
STC12C5616AD-35I-SOP20
Public Made by Adomby adom
STC Micro Microcontrollers (MCU/MPU/SOC), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 6d ago |
| viewers | 6d ago |
| package.json | 6d ago |
| page.json | 6d ago |
| README.md | 6d ago |
| stc12c5616ad-35i-sop20-etched.glb | 6d ago |
| stc12c5616ad-35i-sop20-etched.step | 6d ago |
| stc12c5616ad-35i-sop20-hero.glb | 6d ago |
| stc12c5616ad-35i-sop20-hero.overlay.json | 6d ago |
| stc12c5616ad-35i-sop20.glb | 6d ago |
| stc12c5616ad-35i-sop20.kicad_mod | 6d ago |
| stc12c5616ad-35i-sop20.kicad_sym | 6d ago |
| stc12c5616ad-35i-sop20.lbr | 6d ago |
| stc12c5616ad-35i-sop20.step | 6d ago |
STC12C5616AD-35I-SOP20
STC Micro · Microcontrollers (MCU/MPU/SOC) · SOIC-20-300mil
STC12C5616AD-35I-SOP20 from STC Micro, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | input | Reset input: holding RST high for at least 24 clocks plus 10 us puts the MCU into reset, and pulling it low ends reset and starts execution at 0000H. |
| 2 | P3.0/RxD | bidirectional | Quasi-bidirectional standard I/O (PORT3[0]) that serves as the serial port receive data input RxD. |
| 3 | P3.1/TxD | bidirectional | Quasi-bidirectional standard I/O (PORT3[1]) that serves as the serial port transmit data output TxD. |
| 4 | XTAL2 | output | Output of the internal inverting oscillator amplifier for the external crystal; it may be left floating when an external clock is applied to XTAL1. |
| 5 | XTAL1 | input | Input to the internal inverting oscillator amplifier for the external crystal, and the external clock input when a clock source is applied directly. |
| 6 | P3.2/INT0 | bidirectional | Standard I/O (PORT3[2]) that is also external interrupt 0, triggered on a falling edge or low level. |
| 7 | P3.3/INT1 | bidirectional | Standard I/O (PORT3[3]) that is also external interrupt 1, triggered on a falling edge or low level. |
| 8 | P3.4/T0/ECI | bidirectional | Standard I/O (PORT3[4]) that also serves as the external input of Timer/Counter 0 (T0) and the external pulse input of the PCA counter (ECI). |
| 9 | P3.5/T1/PCA1/PWM1 | bidirectional | Standard I/O (PORT3[5]) that also serves as the external input of Timer/Counter 1 (T1), PCA output 1 and PWM output 1. |
| 10 | Gnd | power_in | Power supply negative terminal, connected to ground. |
| 11 | P3.7/PCA0/PWM0 | bidirectional | Standard I/O (PORT3[7]) that also serves as PCA output 0 and PWM output 0. |
| 12 | P1.0/ADC0/CLKOUT0 | bidirectional | Standard I/O (PORT1[0]) that also serves as ADC input channel 0 and, when enabled via T0CLKO, the Timer 0 clock output CLKOUT0; set to open-drain or high-impedance input before using it as an ADC input. |
| 13 | P1.1/ADC1/CLKOUT1 | bidirectional | Standard I/O (PORT1[1]) that also serves as ADC input channel 1 and, when enabled via T1CLKO, the Timer 1 clock output CLKOUT1; set to open-drain or high-impedance input before using it as an ADC input. |
| 14 | P1.2/ADC2 | bidirectional | Standard I/O (PORT1[2]) that also serves as ADC input channel 2; set to open-drain or high-impedance input before using it as an ADC input. |
| 15 | P1.3/ADC3 | bidirectional | Standard I/O (PORT1[3]) that also serves as ADC input channel 3; set to open-drain or high-impedance input before using it as an ADC input. |
| 16 | P1.4/ADC4/SS | bidirectional | Standard I/O (PORT1[4]) that also serves as ADC input channel 4 and the SPI slave select SS; set to open-drain or high-impedance input before using it as an ADC input. |
| 17 | P1.5/ADC5/MOSI | bidirectional | Standard I/O (PORT1[5]) that also serves as ADC input channel 5 and the SPI master-out/slave-in line MOSI; set to open-drain or high-impedance input before using it as an ADC input. |
| 18 | P1.6/ADC6/MISO | bidirectional | Standard I/O (PORT1[6]) that also serves as ADC input channel 6 and the SPI master-in/slave-out line MISO; set to open-drain or high-impedance input before using it as an ADC input. |
| 19 | P1.7/ADC7/SCLK | bidirectional | Standard I/O (PORT1[7]) that also serves as ADC input channel 7 and the SPI serial clock SCLK; set to open-drain or high-impedance input before using it as an ADC input. |
| 20 | VCC | power_in | Positive power supply pin; the family operates from 5.5 V to 3.5 V per the datasheet's overview. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | SOIC-20-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| ICC Operating Current | ICC | 4 | 20 | mA | 5V | 530 | |
| Input Low Voltage (P0,P1,P2,P3) | VIL1 | 0.8 | V | 5V | 530 | ||
| Input Low Voltage (RESET, XTAL1) | VIL2 | 1.5 | V | 5V | 530 | ||
| Input High Voltage (P0,P1,P2,P3) | VIH1 | 2 | V | 5V | 530 | ||
| Input High Voltage (RESET) | VIH2 | 3 | V | 5V | 530 | ||
| Sourcing Current for output high (P0,P1,P2,P3) (Quasi-output) | IOH1 | 150 | 230 | uA | 5V | 530 | |
| Logic 0 input current (P0,P1,P2,P3) | IIL | 18 | 50 | uA | Vpin=0V | 530 | |
| Logic 1 to 0 transition current (P0,P1,P2,P3) | ITL | 270 | 600 | uA | Vpin=2.0V | 530 | |
| Operating Voltage | VDD | 3.5 | 5 | 5.5 | V | 530 | |
| Operating temperature (I) | TA | -40 | 85 | ℃ | 530 | ||
| DC power supply (5V) | VDD - VSS | -0.3 | 6 | V | 530 | ||
| Voltage on any pin | -0.5 | 5.5 | V | 530 | |||
| Storage temperature | TST | -55 | 125 | ℃ | 530 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the | 172 |
CAD (KiCad official)
- Symbol:
STC12C5616AD-35I-SOP20 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
stc12c5616ad-35i-sop20-etched.step/stc12c5616ad-35i-sop20-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stc12c5616ad-35i-sop20.step/stc12c5616ad-35i-sop20.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (572 pp, sha256
754c84a9d49c2e2d, retrieved 2026-10-20, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).