component
STC12C5204AD-35I-SOP20
Public Made by Adomby adom
STC Micro Microcontrollers (MCU/MPU/SOC), SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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STC12C5204AD-35I-SOP20
STC Micro · Microcontrollers (MCU/MPU/SOC) · SOIC-20-300mil
STC12C5204AD-35I-SOP20 from STC Micro, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | input | Reset pin; holding it high for at least 24 clock cycles plus 10 us puts the MCU into reset, and pulling it back low ends the reset so execution starts at 0000H. |
| 2 | P3.0/RxD | bidirectional | Standard quasi-bidirectional I/O port PORT3[0] that also serves as the UART serial data receive input RxD. |
| 3 | P3.1/TxD | bidirectional | Standard quasi-bidirectional I/O port PORT3[1] that also serves as the UART serial data transmit output TxD. |
| 4 | XTAL2 | output | Output of the internal clock inverting amplifier that connects to the other crystal terminal; it may be left floating when an external clock is applied to XTAL1. |
| 5 | XTAL1 | input | Input of the internal clock inverting amplifier that connects to one crystal terminal, and the external clock source input when an external clock is used. |
| 6 | P3.2/INT0 | bidirectional | Standard I/O port PORT3[2] that also serves as external interrupt 0, triggered on a falling edge or low level. |
| 7 | P3.3/INT1 | bidirectional | Standard I/O port PORT3[3] that also serves as external interrupt 1, triggered on a falling edge or low level. |
| 8 | P3.4/T0/ECI/CLKOUT0 | bidirectional | Standard I/O port PORT3[4] that also serves as external input of Timer/Counter 0 (T0), PCA counter external pulse input (ECI), and Timer 0 clock output CLKOUT0. |
| 9 | P3.5/T1/CCP1/CLKOUT1 | bidirectional | Standard I/O port PORT3[5] that also serves as external input of Timer/Counter 1 (T1), PCA capture/high-speed output/PWM output CCP1, and Timer 1 clock output CLKOUT1. |
| 10 | GND | power_in | Power supply negative terminal (ground). |
| 11 | P3.7/CCP0 | bidirectional | Standard I/O port PORT3[7] that also serves as PCA module 0 capture, high-speed pulse output and PWM output CCP0. |
| 12 | P1.0/ADC0 | bidirectional | Standard I/O port PORT1[0] that also serves as ADC input channel 0; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 13 | P1.1/ADC1 | bidirectional | Standard I/O port PORT1[1] that also serves as ADC input channel 1; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 14 | P1.2/ADC2/EX_LVD/RST2 | bidirectional | Standard I/O port PORT1[2] that also serves as ADC input channel 2, external low-voltage detect interrupt/comparator input EX_LVD, and second reset function pin RST2 (about 1.33 V threshold). |
| 15 | P1.3/ADC3 | bidirectional | Standard I/O port PORT1[3] that also serves as ADC input channel 3; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 16 | P1.4/ADC4 | bidirectional | Standard I/O port PORT1[4] that also serves as ADC input channel 4; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 17 | P1.5/ADC5 | bidirectional | Standard I/O port PORT1[5] that also serves as ADC input channel 5; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 18 | P1.6/ADC6 | bidirectional | Standard I/O port PORT1[6] that also serves as ADC input channel 6; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 19 | P1.7/ADC7 | bidirectional | Standard I/O port PORT1[7] that also serves as ADC input channel 7; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 20 | VCC | power_in | Positive power supply pin; the device operates from 5.5 V to 3.5 V per the selection table. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | SOIC-20-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 3.3 | 5 | 5.5 | V | 391 | |
| Operating Current | ICC | 4 | 20 | mA | 5V | 391 | |
| Power Down Current | IPD | 0.1 | uA | 5V; printed in Typ column as '< 0.1' | 391 | ||
| Input Low (P0,P1,P2,P3) | VIL1 | 0.8 | V | 5V | 391 | ||
| Input High (P0,P1,P2,P3) | VIH1 | 2 | V | 5V | 391 | ||
| Input High (RESET) | VIH2 | 2.2 | V | 5V | 391 | ||
| Sourcing Current for output high (P0,P1,P2,P3) (Quasi-output) | IOH1 | 150 | 230 | uA | 5V | 391 | |
| Logic 0 input current (P0,P1,P2,P3) | IIL | 50 | uA | Vpin=0V | 391 | ||
| Logic 1 to 0 transition current (P0,P1,P2,P3) | ITL | 100 | 270 | 600 | uA | Vpin=2.0V | 391 |
| DC power supply (5V) | VDD - VSS | -0.3 | 5.5 | V | 391 | ||
| Operating temperature (I) | TA | -40 | 85 | ℃ | 391 | ||
| Storage temperature | TST | -55 | 125 | ℃ | 391 | ||
| Voltage on any pin | -0.3 | V | 391 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the | 157 |
CAD (KiCad official)
- Symbol:
STC12C5204AD-35I-SOP20 - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
stc12c5204ad-35i-sop20-etched.step/stc12c5204ad-35i-sop20-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stc12c5204ad-35i-sop20.step/stc12c5204ad-35i-sop20.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STC Micro datasheet (412 pp, sha256
766016da5f13196c, retrieved 2026-10-19, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# STC12C5204AD-35I-SOP20
**STC Micro** · Microcontrollers (MCU/MPU/SOC) · SOIC-20-300mil
STC12C5204AD-35I-SOP20 from STC Micro, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | RST | input | Reset pin; holding it high for at least 24 clock cycles plus 10 us puts the MCU into reset, and pulling it back low ends the reset so execution starts at 0000H. |
| 2 | P3.0/RxD | bidirectional | Standard quasi-bidirectional I/O port PORT3[0] that also serves as the UART serial data receive input RxD. |
| 3 | P3.1/TxD | bidirectional | Standard quasi-bidirectional I/O port PORT3[1] that also serves as the UART serial data transmit output TxD. |
| 4 | XTAL2 | output | Output of the internal clock inverting amplifier that connects to the other crystal terminal; it may be left floating when an external clock is applied to XTAL1. |
| 5 | XTAL1 | input | Input of the internal clock inverting amplifier that connects to one crystal terminal, and the external clock source input when an external clock is used. |
| 6 | P3.2/INT0 | bidirectional | Standard I/O port PORT3[2] that also serves as external interrupt 0, triggered on a falling edge or low level. |
| 7 | P3.3/INT1 | bidirectional | Standard I/O port PORT3[3] that also serves as external interrupt 1, triggered on a falling edge or low level. |
| 8 | P3.4/T0/ECI/CLKOUT0 | bidirectional | Standard I/O port PORT3[4] that also serves as external input of Timer/Counter 0 (T0), PCA counter external pulse input (ECI), and Timer 0 clock output CLKOUT0. |
| 9 | P3.5/T1/CCP1/CLKOUT1 | bidirectional | Standard I/O port PORT3[5] that also serves as external input of Timer/Counter 1 (T1), PCA capture/high-speed output/PWM output CCP1, and Timer 1 clock output CLKOUT1. |
| 10 | GND | power_in | Power supply negative terminal (ground). |
| 11 | P3.7/CCP0 | bidirectional | Standard I/O port PORT3[7] that also serves as PCA module 0 capture, high-speed pulse output and PWM output CCP0. |
| 12 | P1.0/ADC0 | bidirectional | Standard I/O port PORT1[0] that also serves as ADC input channel 0; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 13 | P1.1/ADC1 | bidirectional | Standard I/O port PORT1[1] that also serves as ADC input channel 1; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 14 | P1.2/ADC2/EX_LVD/RST2 | bidirectional | Standard I/O port PORT1[2] that also serves as ADC input channel 2, external low-voltage detect interrupt/comparator input EX_LVD, and second reset function pin RST2 (about 1.33 V threshold). |
| 15 | P1.3/ADC3 | bidirectional | Standard I/O port PORT1[3] that also serves as ADC input channel 3; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 16 | P1.4/ADC4 | bidirectional | Standard I/O port PORT1[4] that also serves as ADC input channel 4; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 17 | P1.5/ADC5 | bidirectional | Standard I/O port PORT1[5] that also serves as ADC input channel 5; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 18 | P1.6/ADC6 | bidirectional | Standard I/O port PORT1[6] that also serves as ADC input channel 6; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 19 | P1.7/ADC7 | bidirectional | Standard I/O port PORT1[7] that also serves as ADC input channel 7; when used as an ADC input it must first be set to open-drain or high-impedance input mode. |
| 20 | VCC | power_in | Positive power supply pin; the device operates from 5.5 V to 3.5 V per the selection table. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STC Micro |
| Package | SOIC-20-300mil |
| Category | Embedded Processors & Controllers |
| Pins | 20 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating Voltage | VDD | 3.3 | 5 | 5.5 | V | | 391 |
| Operating Current | ICC | | 4 | 20 | mA | 5V | 391 |
| Power Down Current | IPD | | | 0.1 | uA | 5V; printed in Typ column as '< 0.1' | 391 |
| Input Low (P0,P1,P2,P3) | VIL1 | | | 0.8 | V | 5V | 391 |
| Input High (P0,P1,P2,P3) | VIH1 | 2 | | | V | 5V | 391 |
| Input High (RESET) | VIH2 | 2.2 | | | V | 5V | 391 |
| Sourcing Current for output high (P0,P1,P2,P3) (Quasi-output) | IOH1 | 150 | 230 | | uA | 5V | 391 |
| Logic 0 input current (P0,P1,P2,P3) | IIL | | | 50 | uA | Vpin=0V | 391 |
| Logic 1 to 0 transition current (P0,P1,P2,P3) | ITL | 100 | 270 | 600 | uA | Vpin=2.0V | 391 |
| DC power supply (5V) | VDD - VSS | -0.3 | | 5.5 | V | | 391 |
| Operating temperature (I) | TA | -40 | | 85 | ℃ | | 391 |
| Storage temperature | TST | -55 | | 125 | ℃ | | 391 |
| Voltage on any pin | | -0.3 | | | V | | 391 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | | Accumulator contents and the contents of a sixteen-bit base register, which may be either the Data Pointer or the PC. In the latter case, the PC is incremented to the address of the | 157 |
## CAD (KiCad official)
- Symbol: `STC12C5204AD-35I-SOP20`
- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`
- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files: `stc12c5204ad-35i-sop20-etched.step` / `stc12c5204ad-35i-sop20-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `stc12c5204ad-35i-sop20.step` / `stc12c5204ad-35i-sop20.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STC Micro datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588882119276048384) (412 pp, sha256 `766016da5f13196c`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/stc12c5204ad-35i-sop20-datasheet.pdf)