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Contents

README

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STB9NK50ZT4

STMicroelectronics · MOSFETs · D2PAK

STB9NK50ZT4 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate control input with ±30 V absolute maximum gate-source voltage rating for switching control.
2 Drain passive Drain terminal connected to thermal tab pad, rated for 500 V maximum drain-source voltage and 7.2 A continuous drain current at TC = 25 °C.
3 Source passive Source terminal providing return path for drain current with integral body diode rated for 7.2 A forward current.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package D2PAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STB9NK50ZT4
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: stb9nk50zt4-etched.step / stb9nk50zt4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stb9nk50zt4.step / stb9nk50zt4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (19 pp, sha256 b81ba5b737cbc061, retrieved 2026-09-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF