component
STB80NF10T4
Public Made by Adomby adom
STMicroelectronics MOSFETs, D2PAK. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSTB80NF10T4
STMicroelectronics · MOSFETs · D2PAK
STB80NF10T4 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate control terminal with ±20 V maximum gate-source voltage rating and 2-4 V gate threshold voltage |
| 2 | Drain | passive | Drain terminal rated for 80 A continuous drain current at 25 °C and 100 °C and maximum 100 V drain-source voltage |
| 3 | Source | passive | Source return terminal with integrated body diode having 1.3 V forward on-voltage at 80 A source-drain current |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | D2PAK |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source voltage (VGS = 0) | VDS | 100 | V | VGS = 0 | 3 | ||
| Gate-source voltage | VGS | -20 | 20 | V | 3 | ||
| Drain current (continuous) | ID | 80 | A | TC = 25 °C; limited by package | 3 | ||
| Drain current (pulsed) | IDM | 320 | A | Pulse width limited by safe operating area | 3 | ||
| Total dissipation | PTOT | 300 | W | TC = 25 °C | 3 | ||
| Derating factor | 2 | W/°C | 3 | ||||
| Peak diode recovery voltage slope | dv/dt | 7 | V/ns | ISD < 80 A, di/dt < 300 A/µs, VDD = 80% V(BR)DSS | 3 | ||
| Single pulse avalanche energy | EAS | 350 | mJ | Starting Tj = 25 °C, ID = 40 A, VDD = 50 V | 3 | ||
| Storage temperature | Tstg | -55 | 175 | °C | Shared value with Tj as printed: -55 to 175 | 3 | |
| Operating junction temperature | Tj | -55 | 175 | °C | Shared value with Tstg as printed: -55 to 175 | 3 | |
| Thermal resistance junction-case | Rthj-case | 0.5 | °C/W | 3 | |||
| Thermal resistance junction-ambient | Rthj-amb | 62.5 | °C/W | 3 | |||
| Maximum lead temperature for soldering | Tl | 300 | °C | For soldering purpose | 3 | ||
| Drain-source breakdown voltage | V(BR)DSS | 100 | V | ID = 250 µA, VGS = 0 | 4 | ||
| Zero gate voltage drain current | IDSS | 500 | nA | VDS = Max rating | 4 | ||
| Zero gate voltage drain current | IDSS | 10 | µA | VDS = Max rating @125 °C | 4 | ||
| Gate-body leakage current | IGSS | -100 | 100 | nA | VDS = 0, VGS = ±20 V | 4 | |
| Gate threshold voltage | VGS(th) | 2 | 3 | 4 | V | VDS = VGS, ID = 250 µA | 4 |
| Static drain-source on resistance | RDS(on) | 0.012 | 0.015 | Ω | VGS = 10 V, ID = 40 A | 4 | |
| Total gate charge | Qg | 135 | 182 | nC | VDD = 50 V, ID = 80 A, VGS = 10 V | 4 | |
| Source-drain current | ISD | 80 | A | 5 | |||
| Source-drain current (pulsed) | ISDM | 320 | A | Pulse width limited by safe operating area | 5 | ||
| Forward on voltage | VSD | 1.3 | V | ISD = 80 A, VGS = 0; pulse duration = 300 µs, duty cycle 1.5% | 5 |
CAD (KiCad official)
- Symbol:
STB80NF10T4 - Footprint:
Package_TO_SOT_SMD:TO-263-2 - 3D model: D2PAK (KiCad packages3D, STEP)
- 3D model files:
stb80nf10t4-etched.step/stb80nf10t4-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);stb80nf10t4.step/stb80nf10t4.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (14 pp, sha256
d005f383bd70a5eb, retrieved 2026-09-23, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).