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Contents

README

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STB55NF06LT4

STMicroelectronics · MOSFETs · D2PAK

STB55NF06LT4 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control terminal that sets the channel conduction state; absolute maximum gate-source voltage is ±16V.
2 D passive Drain terminal, also connected to the exposed metal tab, rated for a drain-source voltage of 60V and continuous drain current up to 55A at Tc=25°C.
3 S passive Source terminal of the power MOSFET, forming the return path for drain current and reference for gate-source voltage.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package D2PAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STB55NF06LT4
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: stb55nf06lt4-etched.step / stb55nf06lt4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stb55nf06lt4.step / stb55nf06lt4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (15 pp, sha256 7e5b235a4d071fd7, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF