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STB14NK60ZT4

STMicroelectronics · MOSFETs · D2PAK

STB14NK60ZT4 from STMicroelectronics, in a D2PAK. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate terminal of the Zener-protected SuperMESH N-channel MOSFET; gate-source voltage is rated ±30 V and the gate is ESD-rated to 4 kV (human body model).
2 D passive Drain terminal, also connected to the mounting tab (D(2, TAB)); drain-source voltage is rated 600 V with 13.5 A continuous drain current at TC = 25 °C.
3 S passive Source terminal, the reference for the gate-source voltage rated at ±30 V.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package D2PAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: STB14NK60ZT4
  • Footprint: Package_TO_SOT_SMD:TO-263-2
  • 3D model: D2PAK (KiCad packages3D, STEP)
  • 3D model files: stb14nk60zt4-etched.step / stb14nk60zt4-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); stb14nk60zt4.step / stb14nk60zt4.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (17 pp, sha256 88a1febbb4c811f3, retrieved 2026-10-08, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF