# ST8R00WPUR

**STMicroelectronics** · DC-DC Converters · DFN-8-EP(4x4)

ST8R00WPUR from STMicroelectronics, in a DFN-8-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | LX | output | Switching output of the step-up converter, with absolute maximum LX pin voltage of 16 V and LX current internally limited. |
| 2 | PGND | power_in | Power ground for the switching stage. |
| 3 | GND | power_in | Analog ground; the exposed pad must be connected to this GND. |
| 4 | IN | power_in | Power input for the analog circuit, with an input voltage range of 4 to 6 V and an absolute maximum of 6 V. |
| 5 | FB | input | Feedback input for the output voltage divider, where the feedback voltage is 1.195 to 1.245 V (1.22 V typ.) at IO = 50 mA. |
| 6 | INH | input | Inhibit input: a voltage above 2 V turns the device ON and a voltage below 0.8 V turns it OFF, with no current flow to the load; absolute maximum inhibit voltage is 6 V. |
| 7 | HV | passive | Trimming pin that must be left floating or connected to GND. |
| 8 | OUT | power_out | Output voltage pin, adjustable from 6 V to 12 V, with an absolute maximum output voltage of 16 V. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | DFN-8-EP(4x4) |
| Category | Power Management ICs |
| Pins | 9 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage | VO |  |  | 16 | V |  | 6 |
| Input voltage | VI |  |  | 6 | V |  | 6 |
| Inhibit voltage | VINH |  |  | 6 | V |  | 6 |
| LX pin voltage | VLX |  |  | 16 | V |  | 6 |
| Storage temperature range | TSTG | -50 |  | 150 | °C |  | 6 |
| Operating junction temperature range | TOP | -25 |  | 125 | °C |  | 6 |
| Output voltage | VO | 6 |  | 12 | V |  | 7 |
| Start-up voltage | VSTART-UP | 3 |  | 3.5 | V | IO = 400mA, VI rising | 7 |
| Input voltage range | VI | 4 |  | 6 | V |  | 7 |
| Feedback voltage | VFB | 1.195 | 1.22 | 1.245 | V | IO = 50mA | 7 |
| Oscillator frequency | fOSC | 0.8 | 1.2 | 1.4 | MHz | To be measured on LX pin | 7 |
| Thermal shut down | TSHDN | 130 |  | 150 | °C |  | 7 |
| Line transient response | ΔVO/ΔVI | -5 |  | 5 | %VO | VI from 4 to 5.5V, IO= 500mA | 7 |
| Load transient response | ΔVO/ΔIO | -5 |  | 5 | %VO | VI = 5V, IO from 10mA to 500mA, VO = 7V | 7 |
| Start-up transient | ΔVO/ΔVI | -10 |  | 10 | %VO | VI from 0 to 5V, IO = 500mA | 7 |
| Max. oscillator duty cycle | DTY |  |  | 90 | % | To be measured on LX pin | 7 |
| Thermal resistance junction-case | RthJC |  | 10 |  | °C/W | junction-case | 6 |
| Thermal resistance junction-ambient | RthJA |  | 50 |  | °C/W | junction-ambient | 6 |
| ESD protection voltage HBM | ESD |  | 4 |  | KV | HBM | 6 |
| ESD protection voltage MM | ESD |  | 500 |  | V | MM | 6 |
| Feedback voltage (off) | VFB_OFF |  | 0 |  | V | IO = 0, VINH = 0 | 7 |
| Feedback current | IFB |  | 600 |  | nA | VFB = 0, VINH = 2V | 7 |
| Supply current | ISUPPLY |  | 10 |  | mA | To be measured at VI, VO = 7V, no load | 7 |
| Internal N channel RDSON | RDSON_N |  | 300 |  | mΩ | ILX = 400mA | 7 |
| Internal P channel RDSON | RDSON_P |  | 300 |  | mΩ | ILX = 400mA | 7 |
| Internal leakage current | ILX(leak) |  | 0.5 |  | µA | VLX = 4V, VFB = 2V, VINH = 0 | 7 |
| LX current limitation | ILX(LIM) |  | 3 |  | A | VLX = 4V | 7 |
| Efficiency | Eff |  | 85 |  | % | IO = 50mA, VO = 7V | 7 |
| Efficiency | Eff |  | 90 |  | % | IO = 500mA, VO = 9V | 7 |
| Inhibit threshold high | VINH_H |  | 2 |  | V |  | 7 |
| Inhibit threshold low | VINH_L |  | 0.8 |  | V | VI = 4 to 6V, IO = 50mA | 7 |
| Inhibit pin current | IINH |  | 2 |  | µA | VINH = VI = 5V | 7 |
| Thermal shut down hysteresis | THYS |  | 15 |  | °C |  | 7 |
| Start-up time | TSTART |  | 500 |  | µs | VINH from 0 to 5V, IO = 100mA | 7 |

## CAD (KiCad official)

- Symbol: `ST8R00WPUR`
- Footprint: `Package_DFN_QFN:DFN-8-1EP_4x4mm_P0.8mm_EP2.5x3.6mm`
- 3D model: DFN-8-EP(4x4) (KiCad packages3D, STEP)
- 3D model files: `st8r00wpur-etched.step` / `st8r00wpur-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `st8r00wpur.step` / `st8r00wpur.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/st8r00wpur.pdf) (18 pp, sha256 `ea3b27c3a96f1090`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/st8r00wpur-datasheet.pdf)