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Contents

README

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ST7590

STMicroelectronics · Telecom Interface ICs · QFN-48(7x7)

ST7590 from STMicroelectronics, in a QFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MOSI0_TXD bidirectional UART data out or SPI0 data in, as a digital I/O pin with internal active pull-up in input mode.
2 MISO0_RXD bidirectional UART data in or SPI0 data out, as a digital I/O pin with internal active pull-up in input mode.
3 VDDIO power_in 3.3 V to 5 V I/O supply (3.3 or 5 V, -10% to +10%, per Table 4).
4 TRSTN input JTAG interface reset, active low, with internal active pull-up.
5 TMS input JTAG interface test mode selection, with internal active pull-up.
6 GND power_in Ground.
7 TCK input JTAG interface clock.
8 TDO bidirectional JTAG interface data out, as a digital I/O pin.
9 TDI input JTAG interface data in, with internal active pull-up.
10 RESETN input System reset, active low; a reset pulse shorter than 1 µs is not guaranteed valid (minimum valid pulse 1 µs).
11 VDD power_in Digital core supply, 1.8 V externally supplied with -10% to +10% tolerance.
12 XIN input Crystal oscillator input for an 8 MHz crystal, or an external 8 MHz clock input.
13 XOUT output Crystal oscillator output for an 8 MHz crystal; left floating when an external clock drives XIN.
14 GND power_in Ground.
15 VSSA power_in Analog ground.
16 VDD_PLL power_in 1.8 V PLL supply voltage, equal to VDD.
17 VCCA power_out 5 V analog supply from internal regulator output, intended for filtering only and not for supplying external circuitry.
18 ZC_IN input Zero-crossing detection input with a maximum input voltage range of 10 Vpp.
19 RX_IN input Receiver analog input, maximum 16 Vpp with VCC = 18 V and 10 kΩ input impedance.
20 TX_OUT output Transmission analog output, 1 kΩ output resistance in RX mode.
21 PA_IN_P input Power amplifier non-inverting input.
22 PA_IN_N input Power amplifier inverting input.
23 CL input Current limiting feedback from the power amplifier; current sense high threshold 2.35 V.
24 VCC power_in Main power supply, listed as 12 V to 20 V in the pin table (electrical characteristics specify 8 V to 18 V, absolute maximum 20 V).
25 VSS power_in Power amplifier power ground.
26 PA_OUT output Power amplifier output, rated up to 1000 mA rms maximum (1 Arms typical).
27 VDD_REG_1V8 power_out 1.8 V digital supply from the internal regulator output, intended for filtering only and not for external circuitry.
28 VDDIO power_in 3.3 V to 5 V I/O supply (3.3 or 5 V, -10% to +10%, per Table 4).
29 GPIO9 bidirectional General purpose I/O.
30 GPIO8 bidirectional General purpose I/O.
31 GPIO7 bidirectional General purpose I/O.
32 GPIO6 bidirectional General purpose I/O.
33 GND power_in Ground.
34 VDDIO power_in 3.3 V to 5 V I/O supply (3.3 or 5 V, -10% to +10%, per Table 4).
35 VDD_12V power_in OTP programming voltage, 12 V.
36 GPIO5 bidirectional General purpose I/O.
37 GPIO4 bidirectional General purpose I/O.
38 GPIO3 bidirectional General purpose I/O.
39 GPIO2 bidirectional General purpose I/O.
40 GPIO1 bidirectional General purpose I/O.
41 GPIO0 bidirectional General purpose I/O.
42 SCLK1_SCL output SPI1 serial clock output and I2C serial clock (I2C always selected at boot).
43 MOSI1_SDA bidirectional SPI1 data out and I2C data in (I2C always selected at boot).
44 MISO1 input SPI1 data in.
45 GND power_in Ground.
46 VDD power_in Digital power supply, 1.8 V.
47 SSN0 input SPI0 slave select, active low.
48 SCLK0 input SPI0 serial clock.
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package QFN-48(7x7)
Category Interface
Pins 49

CAD (KiCad official)

  • Symbol: ST7590
  • Footprint: Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm
  • 3D model: QFN-48(7x7) (KiCad packages3D, STEP)
  • 3D model files: st7590-etched.step / st7590-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); st7590.step / st7590.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (24 pp, sha256 65d4b945943a12a5, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF