ST730M50R
Public Made by Adomby adom
STMicroelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
ST730M50R
STMicroelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L
ST730M50R from STMicroelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output voltage pin, which for the 5.0 V fixed version ST730M50R delivers 5.0 V with up to 300 mA. |
| 2 | GND | power_in | Ground reference pin to which all datasheet absolute maximum ratings are referred. |
| 3 | VIN | power_in | Input voltage pin that supplies the regulator and must be decoupled with an input capacitor placed close to it. |
| 4 | NC/ADJ | unconnected | Not internally connected in the fixed version, so it is left unconnected on the ST730M50R, whereas the adjustable version uses it to connect an external resistor divider that sets the output voltage. |
| 5 | EN | input | Enable pin where low puts the device in shutdown and high activates it, and it must not be left floating. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-5L |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VIN | 2.5 | 28 | V | 6 | ||
| Output voltage accuracy (TJ = 25 °C) | VOUT | -0.5 | 0.5 | % | TJ = 25 °C | 6 | |
| Output voltage accuracy (-40 °C to +125 °C) | VOUT | -2.5 | 2.5 | % | -40 °C < TJ < +125 °C | 6 | |
| Static line regulation | ΔVOUT | 0.003 | 0.05 | %/V | VIN = VOUT(NOM) + 1 V to 28 V (1) | 6 | |
| Static load regulation | ΔVOUT | 40 | 70 | mV | IOUT = 1 mA to 300 mA (2) | 6 | |
| Dropout voltage at 100 mA | VDROP | 200 | 400 | mV | IOUT = 100 mA, VOUT = VOUT(NOM) - 0.1 V, VOUT(NOM) ≥ 2.5 V | 6 | |
| Dropout voltage at 300 mA | VDROP | 600 | 1200 | mV | IOUT = 300 mA, VOUT = VOUT(NOM) - 0.1 V, VOUT(NOM) ≥ 2.5 V | 6 | |
| Quiescent current at no load | IQ | 5 | 10 | µA | IOUT = 0 mA | 6 | |
| Quiescent current at 300 mA | IQ | 120 | 240 | µA | IOUT = 300 mA | 6 | |
| Standby current | 0.35 | 1 | µA | VIN = 2.5 V to 28 V, VEN = GND | 6 | ||
| Enable input logic high | VEN | 1.2 | V | 6 | |||
| Enable pin current | IEN | 100 | nA | VEN = VIN | 6 | ||
| Input capacitor minimum | CIN | 0.1 | µF | 8 | |||
| Output capacitor minimum | COUT | 0.47 | µF | ceramic X5R/X7R type | 8 | ||
| Output capacitor ESR | ESR | 5 | 500 | mΩ | 8 | ||
| DC input voltage (absolute maximum) | VIN | -0.3 | 30 | V | 5 | ||
| DC output voltage (absolute maximum) | VOUT | -0.3 | V | upper limit printed as VIN + 0.3 | 5 | ||
| Enable pin voltage (absolute maximum) | VEN | -0.3 | 30 | V | 5 | ||
| Storage temperature range | TST | -65 | 150 | °C | 5 | ||
| Operating temperature range | TOP | -40 | 125 | °C | 5 | ||
| Human body model ESD | HBM | -2 | 2 | kV | 5 | ||
| Charged device model ESD | CDM | -500 | 500 | V | 5 | ||
| Thermal resistance junction-ambient | RthJA | 190 | °C/W | 4-layer (2S2P) JEDEC board per JESD 51-7 | 5 | ||
| Thermal resistance junction-case | RthJC | 75 | °C/W | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | the PCB copper area through the package leads. The PCB copper area acts as a heat sink. The footprint copper | 8 |
CAD (KiCad official)
- Symbol:
ST730M50R - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files:
st730m50r-etched.step/st730m50r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);st730m50r.step/st730m50r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STMicroelectronics datasheet (23 pp, sha256
d57671a28e22aa41, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ST730M50R
**STMicroelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5L
ST730M50R from STMicroelectronics, in a SOT-23-5L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Regulated output voltage pin, which for the 5.0 V fixed version ST730M50R delivers 5.0 V with up to 300 mA. |
| 2 | GND | power_in | Ground reference pin to which all datasheet absolute maximum ratings are referred. |
| 3 | VIN | power_in | Input voltage pin that supplies the regulator and must be decoupled with an input capacitor placed close to it. |
| 4 | NC/ADJ | unconnected | Not internally connected in the fixed version, so it is left unconnected on the ST730M50R, whereas the adjustable version uses it to connect an external resistor divider that sets the output voltage. |
| 5 | EN | input | Enable pin where low puts the device in shutdown and high activates it, and it must not be left floating. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STMicroelectronics |
| Package | SOT-23-5L |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating input voltage | VIN | 2.5 | | 28 | V | | 6 |
| Output voltage accuracy (TJ = 25 °C) | VOUT | -0.5 | | 0.5 | % | TJ = 25 °C | 6 |
| Output voltage accuracy (-40 °C to +125 °C) | VOUT | -2.5 | | 2.5 | % | -40 °C < TJ < +125 °C | 6 |
| Static line regulation | ΔVOUT | | 0.003 | 0.05 | %/V | VIN = VOUT(NOM) + 1 V to 28 V (1) | 6 |
| Static load regulation | ΔVOUT | | 40 | 70 | mV | IOUT = 1 mA to 300 mA (2) | 6 |
| Dropout voltage at 100 mA | VDROP | | 200 | 400 | mV | IOUT = 100 mA, VOUT = VOUT(NOM) - 0.1 V, VOUT(NOM) ≥ 2.5 V | 6 |
| Dropout voltage at 300 mA | VDROP | | 600 | 1200 | mV | IOUT = 300 mA, VOUT = VOUT(NOM) - 0.1 V, VOUT(NOM) ≥ 2.5 V | 6 |
| Quiescent current at no load | IQ | | 5 | 10 | µA | IOUT = 0 mA | 6 |
| Quiescent current at 300 mA | IQ | | 120 | 240 | µA | IOUT = 300 mA | 6 |
| Standby current | | | 0.35 | 1 | µA | VIN = 2.5 V to 28 V, VEN = GND | 6 |
| Enable input logic high | VEN | 1.2 | | | V | | 6 |
| Enable pin current | IEN | | | 100 | nA | VEN = VIN | 6 |
| Input capacitor minimum | CIN | 0.1 | | | µF | | 8 |
| Output capacitor minimum | COUT | 0.47 | | | µF | ceramic X5R/X7R type | 8 |
| Output capacitor ESR | ESR | 5 | | 500 | mΩ | | 8 |
| DC input voltage (absolute maximum) | VIN | -0.3 | | 30 | V | | 5 |
| DC output voltage (absolute maximum) | VOUT | -0.3 | | | V | upper limit printed as VIN + 0.3 | 5 |
| Enable pin voltage (absolute maximum) | VEN | -0.3 | | 30 | V | | 5 |
| Storage temperature range | TST | -65 | | 150 | °C | | 5 |
| Operating temperature range | TOP | -40 | | 125 | °C | | 5 |
| Human body model ESD | HBM | -2 | | 2 | kV | | 5 |
| Charged device model ESD | CDM | -500 | | 500 | V | | 5 |
| Thermal resistance junction-ambient | RthJA | | 190 | | °C/W | 4-layer (2S2P) JEDEC board per JESD 51-7 | 5 |
| Thermal resistance junction-case | RthJC | | 75 | | °C/W | | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | the PCB copper area through the package leads. The PCB copper area acts as a heat sink. The footprint copper | 8 |
## CAD (KiCad official)
- Symbol: `ST730M50R`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5L (KiCad packages3D, STEP)
- 3D model files: `st730m50r-etched.step` / `st730m50r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `st730m50r.step` / `st730m50r.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STMicroelectronics datasheet](https://www.st.com/resource/en/datasheet/st730m50r.pdf) (23 pp, sha256 `d57671a28e22aa41`, retrieved 2026-11-05, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/st730m50r-datasheet.pdf)