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ST72F324BJ6T6
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STMicroelectronics Microcontrollers (MCU/MPU/SOC), LQFP-44(10x10). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+80@@ -0,0 +1,80 @@+# ST72F324BJ6T6++**STMicroelectronics** · Microcontrollers (MCU/MPU/SOC) · LQFP-44(10x10)++ST72F324BJ6T6 from STMicroelectronics, in a LQFP-44(10x10). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PE1/RDI | bidirectional | Port E1 bidirectional I/O (CMOS 0.3VDD/0.7VDD with input trigger), alternate function SCI receive data input. |+| 2 | PB0 | bidirectional | Port B0 I/O with external interrupt source ei2; negative current injection is not allowed on this pin on 8/16 Kbyte Flash devices. |+| 3 | PB1 | bidirectional | Port B1 general-purpose I/O with external interrupt source ei2. |+| 4 | PB2 | bidirectional | Port B2 general-purpose I/O with external interrupt source ei2. |+| 5 | PB3 | bidirectional | Port B3 general-purpose I/O with external interrupt source ei2. |+| 6 | PB4 | bidirectional | Port B4 I/O with external interrupt source ei3 and 20 mA high-sink capability (N-buffer only). |+| 7 | PD0/AIN0 | bidirectional | Port D0 I/O that doubles as ADC analog input 0; when used as analog input it must be configured as input, no pull-up, no interrupt. |+| 8 | PD1/AIN1 | bidirectional | Port D1 I/O that doubles as ADC analog input 1; when used as analog input it must be configured as input, no pull-up, no interrupt. |+| 9 | PD2/AIN2 | bidirectional | Port D2 I/O that doubles as ADC analog input 2; when used as analog input it must be configured as input, no pull-up, no interrupt. |+| 10 | PD3/AIN3 | bidirectional | Port D3 I/O that doubles as ADC analog input 3; when used as analog input it must be configured as input, no pull-up, no interrupt. |+| 11 | PD4/AIN4 | bidirectional | Port D4 I/O that doubles as ADC analog input 4; when used as analog input it must be configured as input, no pull-up, no interrupt. |+| 12 | PD5/AIN5 | bidirectional | Port D5 I/O that doubles as ADC analog input 5; when used as analog input it must be configured as input, no pull-up, no interrupt. |+| 13 | VAREF | power_in | Analog reference voltage for the ADC; all available VDD and VREF pins must be connected to the supply voltage. |+| 14 | VSSA | power_in | Analog ground voltage for the ADC; all VSS and VSSA pins must be connected to ground. |+| 15 | PF0/MCO/AIN8 | bidirectional | Port F0 I/O with external interrupt ei1; alternate functions are main clock output (fCPU) and ADC analog input 8. |+| 16 | PF1/BEEP | bidirectional | Port F1 I/O with 20 mA high-sink capability and external interrupt ei1; alternate function is beep signal output. |+| 17 | PF2 | bidirectional | Port F2 I/O with 20 mA high-sink capability and external interrupt ei1. |+| 18 | PF4/OCMP1_A/AIN10 | bidirectional | Port F4 I/O; alternate functions are Timer A output compare 1 and ADC analog input 10. |+| 19 | PF6/ICAP1_A | bidirectional | Port F6 I/O with 20 mA high-sink capability; alternate function is Timer A input capture 1. |+| 20 | PF7/EXTCLK_A | bidirectional | Port F7 I/O with 20 mA high-sink capability; alternate function is Timer A external clock source. |+| 21 | VDD_0 | power_in | Digital main supply voltage; operating range is 3.8 to 5.5 V and all VDD pins must be connected to the supply. |+| 22 | VSS_0 | power_in | Digital ground voltage; all VSS pins must be connected to ground. |+| 23 | PC0/OCMP2_B/AIN12 | bidirectional | Port C0 I/O; alternate functions are Timer B output compare 2 and ADC analog input 12. |+| 24 | PC1/OCMP1_B/AIN13 | bidirectional | Port C1 I/O; alternate functions are Timer B output compare 1 and ADC analog input 13. |+| 25 | PC2/ICAP2_B | bidirectional | Port C2 I/O with 20 mA high-sink capability; alternate function is Timer B input capture 2. |+| 26 | PC3/ICAP1_B | bidirectional | Port C3 I/O with 20 mA high-sink capability; alternate function is Timer B input capture 1. |+| 27 | PC4/MISO/ICCDATA | bidirectional | Port C4 I/O; alternate functions are SPI master-in/slave-out data and ICC data input. |+| 28 | PC5/MOSI/AIN14 | bidirectional | Port C5 I/O; alternate functions are SPI master-out/slave-in data and ADC analog input 14. |+| 29 | PC6/SCK/ICCCLK | bidirectional | Port C6 I/O; alternate functions are SPI serial clock and ICC clock output. |+| 30 | PC7/SS/AIN15 | bidirectional | Port C7 I/O; alternate functions are SPI slave select (active low) and ADC analog input 15. |+| 31 | PA3 | bidirectional | Port A3 I/O with 20 mA high-sink capability and external interrupt ei0. |+| 32 | VDD_1 | power_in | Digital main supply voltage; all VDD pins must be connected to the supply. |+| 33 | VSS_1 | power_in | Digital ground voltage; all VSS pins must be connected to ground. |+| 34 | PA4 | bidirectional | Port A4 I/O with 20 mA high-sink capability. |+| 35 | PA5 | bidirectional | Port A5 I/O with 20 mA high-sink capability. |+| 36 | PA6 | bidirectional | Port A6 I/O implemented as a true open-drain pad (no protection diode to VDD) with 20 mA high-sink capability. |+| 37 | PA7 | bidirectional | Port A7 I/O implemented as a true open-drain pad (no protection diode to VDD) with 20 mA high-sink capability. |+| 38 | VPP/ICCSEL | input | Must be tied low in normal operation; in Flash programming mode it is the VPP programming voltage input, and high voltage must not be applied to ROM devices. |+| 39 | RESET | bidirectional | Reset I/O pin with top-priority non-maskable interrupt function. |+| 40 | VSS_2 | power_in | Digital ground voltage; all VSS pins must be connected to ground. |+| 41 | OSC2 | output | Resonator oscillator inverter output for connection of a crystal or ceramic resonator. |+| 42 | OSC1 | input | External clock input or resonator oscillator inverter input. |+| 43 | VDD_2 | power_in | Digital main supply voltage; all VDD pins must be connected to the supply. |+| 44 | PE0/TDO | bidirectional | Port E0 I/O; alternate function is SCI transmit data output. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | STMicroelectronics |+| Package | LQFP-44(10x10) |+| Category | Embedded Processors & Controllers |+| Pins | 44 |++## CAD (KiCad official)++- Symbol: `ST72F324BJ6T6`+- Footprint: `Package_QFP:LQFP-44_10x10mm_P0.8mm`+- 3D model: LQFP-44(10x10) (KiCad packages3D, STEP)+- 3D model files: `st72f324bj6t6-etched.step` / `st72f324bj6t6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `st72f324bj6t6.step` / `st72f324bj6t6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [STMicroelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923060934086657) (198 pp, sha256 `5f25336efa7e0074`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/st72f324bj6t6-datasheet.pdf)
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negative current injection is not allowed on this pin on 8/16 Kbyte Flash devices."+ },+ {+ "number": "3",+ "name": "PB1",+ "type": "bidirectional",+ "description": "Port B1 general-purpose I/O with external interrupt source ei2."+ },+ {+ "number": "4",+ "name": "PB2",+ "type": "bidirectional",+ "description": "Port B2 general-purpose I/O with external interrupt source ei2."+ },+ {+ "number": "5",+ "name": "PB3",+ "type": "bidirectional",+ "description": "Port B3 general-purpose I/O with external interrupt source ei2."+ },+ {+ "number": "6",+ "name": "PB4",+ "type": "bidirectional",+ "description": "Port B4 I/O with external interrupt source ei3 and 20 mA high-sink capability (N-buffer only)."+ },+ {+ "number": "7",+ "name": "PD0/AIN0",+ "type": "bidirectional",+ "description": "Port D0 I/O that doubles as ADC analog input 0; when used as analog input it must be configured as input, no pull-up, no interrupt."+ },+ {+ "number": "8",+ "name": "PD1/AIN1",+ "type": "bidirectional",+ "description": "Port D1 I/O that doubles as ADC analog input 1; when used as analog input it must be configured as input, no pull-up, no interrupt."+ },+ {+ "number": "9",+ "name": "PD2/AIN2",+ "type": "bidirectional",+ "description": "Port D2 I/O that doubles as ADC analog input 2; when used as analog input it must be configured as input, no pull-up, no interrupt."+ },+ {+ "number": "10",+ "name": "PD3/AIN3",+ "type": "bidirectional",+ "description": "Port D3 I/O that doubles as ADC analog input 3; when used as analog input it must be configured as input, no pull-up, no interrupt."+ },+ {+ "number": "11",+ "name": "PD4/AIN4",+ "type": "bidirectional",+ "description": "Port D4 I/O that doubles as ADC analog input 4; when used as analog input it must be configured as input, no pull-up, no interrupt."+ },+ {+ "number": "12",+ "name": "PD5/AIN5",+ "type": "bidirectional",+ "description": "Port D5 I/O that doubles as ADC analog input 5; when used as analog input it must be configured as input, no pull-up, no interrupt."+ },+ {+ "number": "13",+ "name": "VAREF",+ "type": "power_in",+ "description": "Analog reference voltage for the ADC; all available VDD and VREF pins must be connected to the supply voltage."+ },+ {+ "number": "14",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground voltage for the ADC; all VSS and VSSA pins must be connected to ground."+ },+ {+ "number": "15",+ "name": "PF0/MCO/AIN8",+ "type": "bidirectional",+ "description": "Port F0 I/O with external interrupt ei1; alternate functions are main clock output (fCPU) and ADC analog input 8."+ },+ {+ "number": "16",+ "name": "PF1/BEEP",+ "type": "bidirectional",+ "description": "Port F1 I/O with 20 mA high-sink capability and external interrupt ei1; alternate function is beep signal output."+ },+ {+ "number": "17",+ "name": "PF2",+ "type": "bidirectional",+ "description": "Port F2 I/O with 20 mA high-sink capability and external interrupt ei1."+ },+ {+ "number": "18",+ "name": "PF4/OCMP1_A/AIN10",+ "type": "bidirectional",+ "description": "Port F4 I/O; alternate functions are Timer A output compare 1 and ADC analog input 10."+ },+ {+ "number": "19",+ "name": "PF6/ICAP1_A",+ "type": "bidirectional",+ "description": "Port F6 I/O with 20 mA high-sink capability; alternate function is Timer A input capture 1."+ },+ {+ "number": "20",+ "name": "PF7/EXTCLK_A",+ "type": "bidirectional",+ "description": "Port F7 I/O with 20 mA high-sink capability; alternate function is Timer A external clock source."+ },+ {+ "number": "21",+ "name": "VDD_0",+ "type": "power_in",+ "description": "Digital main supply voltage; operating range is 3.8 to 5.5 V and all VDD pins must be connected to the supply."+ },+ {+ "number": "22",+ "name": "VSS_0",+ "type": "power_in",+ "description": "Digital ground voltage; all VSS pins must be connected to ground."+ },+ {+ "number": "23",+ "name": "PC0/OCMP2_B/AIN12",+ "type": "bidirectional",+ "description": "Port C0 I/O; alternate functions are Timer B output compare 2 and ADC analog input 12."+ },+ {+ "number": "24",+ "name": "PC1/OCMP1_B/AIN13",+ "type": "bidirectional",+ "description": "Port C1 I/O; alternate functions are Timer B output compare 1 and ADC analog input 13."+ },+ {+ "number": "25",+ "name": "PC2/ICAP2_B",+ "type": "bidirectional",+ "description": "Port C2 I/O with 20 mA high-sink capability; alternate function is Timer B input capture 2."+ },+ {+ "number": "26",+ "name": "PC3/ICAP1_B",+ "type": "bidirectional",+ "description": "Port C3 I/O with 20 mA high-sink capability; alternate function is Timer B input capture 1."+ },+ {+ "number": "27",+ "name": "PC4/MISO/ICCDATA",+ "type": "bidirectional",+ "description": "Port C4 I/O; alternate functions are SPI master-in/slave-out data and ICC data input."+ },+ {+ "number": "28",+ "name": "PC5/MOSI/AIN14",+ "type": "bidirectional",+ "description": "Port C5 I/O; alternate functions are SPI master-out/slave-in data and ADC analog input 14."+ },+ {+ "number": "29",+ "name": "PC6/SCK/ICCCLK",+ "type": "bidirectional",+ "description": "Port C6 I/O; alternate functions are SPI serial clock and ICC clock output."+ },+ {+ "number": "30",+ "name": "PC7/SS/AIN15",+ "type": "bidirectional",+ "description": "Port C7 I/O; alternate functions are SPI slave select (active low) and ADC analog input 15."+ },+ {+ "number": "31",+ "name": "PA3",+ "type": "bidirectional",+ "description": "Port A3 I/O with 20 mA high-sink capability and external interrupt ei0."+ },+ {+ "number": "32",+ "name": "VDD_1",+ "type": "power_in",+ "description": "Digital main supply voltage; all VDD pins must be connected to the supply."+ },+ {+ "number": "33",+ "name": "VSS_1",+ "type": "power_in",+ "description": "Digital ground voltage; all VSS pins must be connected to ground."+ },+ {+ "number": "34",+ "name": "PA4",+ "type": "bidirectional",+ "description": "Port A4 I/O with 20 mA high-sink capability."+ },+ {+ "number": "35",+ "name": "PA5",+ "type": "bidirectional",+ "description": "Port A5 I/O with 20 mA high-sink capability."+ },+ {+ "number": "36",+ "name": "PA6",+ "type": "bidirectional",+ "description": "Port A6 I/O implemented as a true open-drain pad (no protection diode to VDD) with 20 mA high-sink capability."+ },+ {+ "number": "37",+ "name": "PA7",+ "type": "bidirectional",+ "description": "Port A7 I/O implemented as a true open-drain pad (no protection diode to VDD) with 20 mA high-sink capability."+ },+ {+ "number": "38",+ "name": "VPP/ICCSEL",+ "type": "input",+ "description": "Must be tied low in normal operation; in Flash programming mode it is the VPP programming voltage input, and high voltage must not be applied to ROM devices."+ },+ {+ "number": "39",+ "name": "RESET",+ "type": "bidirectional",+ "description": "Reset I/O pin with top-priority non-maskable interrupt function."+ },+ {+ "number": "40",+ "name": "VSS_2",+ "type": "power_in",+ "description": "Digital ground voltage; all VSS pins must be connected to ground."+ },+ {+ "number": "41",+ "name": "OSC2",+ "type": "output",+ "description": "Resonator oscillator inverter output for connection of a crystal or ceramic resonator."+ },+ {+ "number": "42",+ "name": "OSC1",+ "type": "input",+ "description": "External clock input or resonator oscillator inverter input."+ },+ {+ "number": "43",+ "name": "VDD_2",+ "type": "power_in",+ "description": "Digital main supply voltage; all VDD pins must be connected to the supply."+ },+ {+ "number": "44",+ "name": "PE0/TDO",+ "type": "bidirectional",+ "description": "Port E0 I/O; alternate function is SCI transmit data output."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet covers the ST72324Bxx-Auto family (Doc ID13466 Rev 4, 2010). The pinout for LQFP44 (pa; Pin 2 (PB0) caution: negative current injection is not allowed on 8/16 Kbyte Flash devices. This par; Pin types follow the datasheet I/O classification. Pin 39 RESET is listed as I/O and mapped to bidir"+ ],+ "pages_sent": 56,+ "cost_usd": 0.2747,+ "at": "2026-10-08T04:26:30"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588923060934086657",+ "pages": 198,+ "sha256": "5f25336efa7e0074",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 44,+ "described": 44,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "st72f324bj6t6.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "81aae6270b5c742bed79a8a35e9adf7fbed97c42e341e6b25ab20c1783b93b5d",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "st72f324bj6t6-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 12,+ 12,+ 1.5+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "8b1dc13988e3a9cdf392e76e0e71530415c20e308c476c38e9f975ca4b518f47",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}