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ST2341S23RG
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STANSON Tech MOSFETs, SOT-23-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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ST2341S23RG
STANSON Tech · MOSFETs · SOT-23-3L
ST2341S23RG from STANSON Tech, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal of the P-channel enhancement MOSFET; the absolute maximum gate-source voltage VGSS is ±12 V. |
| 2 | Source | passive | Source terminal of the MOSFET; the continuous source (diode conduction) current IS is rated at -1.0 A. |
| 3 | Drain | passive | Drain terminal of the MOSFET; drain-source voltage VDSS is -20 V and continuous drain current ID is -5.3 A at TA=25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STANSON Tech |
| Package | SOT-23-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
ST2341S23RG - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3L (KiCad packages3D, STEP)
- 3D model files:
st2341s23rg-etched.step/st2341s23rg-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);st2341s23rg.step/st2341s23rg.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: STANSON Tech datasheet (6 pp, sha256
ea6436068f7352dc, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# ST2341S23RG
**STANSON Tech** · MOSFETs · SOT-23-3L
ST2341S23RG from STANSON Tech, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate terminal of the P-channel enhancement MOSFET; the absolute maximum gate-source voltage VGSS is ±12 V. |
| 2 | Source | passive | Source terminal of the MOSFET; the continuous source (diode conduction) current IS is rated at -1.0 A. |
| 3 | Drain | passive | Drain terminal of the MOSFET; drain-source voltage VDSS is -20 V and continuous drain current ID is -5.3 A at TA=25°C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | STANSON Tech |
| Package | SOT-23-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `ST2341S23RG`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3L (KiCad packages3D, STEP)
- 3D model files: `st2341s23rg-etched.step` / `st2341s23rg-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `st2341s23rg.step` / `st2341s23rg.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [STANSON Tech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907496202752001) (6 pp, sha256 `ea6436068f7352dc`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/st2341s23rg-datasheet.pdf)