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ST1S14PHR

Public Made by Adom

by adom

STMicroelectronics DC-DC Converters, SOIC-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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ST1S14PHR

STMicroelectronics · DC-DC Converters · SOIC-8

ST1S14PHR from STMicroelectronics, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BOOT passive Bootstrap capacitor pin for the N-channel high-side gate driver. Connect a 100 nF low-ESR ceramic capacitor between BOOT and SW. Absolute max 55 V.
2 PG output Power good open-collector output. Asserts when VFB reaches ~0.92VOUT (rising) and de-asserts at ~0.8VOUT (falling). VOL ≤ 0.4 V at ISINK = 6 mA. Requires an external pull-up. Absolute max -0.3 to (VIN+0.3) V.
3 EN1 input Active-low enable input. Device is ON when EN1 is low (≤0.5 V) and EN2 is high (≥1.5 V). Biasing current ~1.6 µA at 5 V. Absolute max -0.3 to 7 V.
4 FB input Feedback voltage input to the error amplifier. Internal reference is typ. 1.22 V (1.202-1.239 V). Bias current ≤50 nA. Connect to the external resistor divider from VOUT. Absolute max -0.3 to 3 V.
5 EN2 input Active-high enable input. Device is ON only when EN2 is high (≥1.5 V) and EN1 is low. Biasing current up to 10 µA. Absolute max -0.3 to (VIN+0.3) V.
6 GND power_in Device ground. The exposed pad must also be soldered to this ground plane for proper thermal and electrical performance.
7 VIN power_in Input supply pin. Operating range 5.5 V to 48 V; absolute max 52 V. Decouple locally with a low-ESR ceramic input capacitor.
8 SW power_out Switching node - drain of the internal N-channel power MOSFET. Connect to the external inductor and freewheeling Schottky diode. Absolute max -1 to (VIN+0.3) V.
EP EP power_in Exposed thermal pad on the underside of the HSOP-8 package. Must be soldered to the GND plane to provide the primary thermal path (RthJA ≈ 40 °C/W) and complete the ground connection.

Key specifications

Parameter Value
Manufacturer STMicroelectronics
Package SOIC-8
Category PMIC
Pins 9

Ordering variants

Same part, different packaging or reel option.

  • ST1S14PHR

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Power supply input voltage VIN -0.3 52 V 7
Enable 1 voltage VEN1 -0.3 7 V 7
Enable 2 voltage VEN2 -0.3 V 7
Power good PG -0.3 V 7
Bootstrap pin BOOT -0.3 55 V 7
Switching node SW -1 V 7
Feedback voltage VFB -0.3 3 V 7
Operating junction temperature range TJ -40 150 °C 7
Storage temperature range TSTG -65 150 °C 7
Lead temperature (soldering 10 sec.) TLEAD 260 °C soldering 10 sec. 7
Thermal resistance junction-ambient Rth JA 40 °C/W 7
Operating input voltage range VIN 5.5 48 V 8
MOSFET on resistance RDS(on) 0.2 0.4 Ω ISW=1 A 8
Maximum limiting current ISW 3.7 4.5 5.2 A 8
Hiccup time tHICCUP 16 ms 8
Switching frequency fSW 600 850 1000 kHz 8
Duty cycle 90 % 8
Minimum conduction time of the power element TON MIN 90 ns 8
Minimum conduction time of the external diode TOFF MIN 75 90 120 ns 8
Voltage feedback VFB 1.202 1.22 1.239 V ILOAD=0 A 8
Voltage feedback VFB 1.196 1.22 1.245 V ILOAD=10 mA to 3 A 8
FB biasing current IFB 50 nA 8
Quiescent current Iq 1.3 2 mA VFB=2 V 8
Quiescent current Iq 1.7 2.4 mA VFB=2 V, VIN=48 V 8
Standby quiescent current Iqst-by 16 34 μA Device OFF (see Table 2) 8
PG output voltage (open collector active) 0.4 V ISINK=6 mA 8
Enable 1 levels, device ON VEN1 0.5 V Device ON, VIN=5.5 V to 48 V 9
Enable 1 levels, device OFF VEN1 1.5 V Device OFF, VIN=5.5 V to 48 V 9
Enable 1 biasing current IEN1 0.7 1.6 3.5 μA VEN1=5 V 9
Enable 2 levels, device ON VEN2 1.5 V Device ON, VIN=5.5 V to 48 V 9
Enable 2 levels, device OFF VEN2 0.5 V Device OFF, VIN=5.5 V to 48 V 9
Enable 2 biasing current IEN2 -1 -2.4 -4.5 μA VEN1=0 V; VEN2=0 V 9
Enable 2 biasing current IEN2 2.7 5.8 10 μA VEN1=0 V; VEN2=12 V 9
Enable 2 biasing current IEN2 3 6 10 μA VEN1=0 V; VCC=VEN2=48 V 9
Thermal shutdown temperature TSHDWN 140 150 160 °C 9
Thermal shutdown hysteresis THYS 15 °C 9

CAD (KiCad official)

  • Symbol: ST1S14PHR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: st1s14phr-etched.step / st1s14phr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); st1s14phr.step / st1s14phr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
st1s14phr.step 122 KB You want the bare part, or you mark your own boards.
st1s14phr-etched.step 1.8 MB You want the part with ST1S14PHR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 463 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: STMicroelectronics datasheet (46 pp, sha256 c72a54d61a0f530a, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF