Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity

main

Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	Publish 0.1.0 · Ray	1d ago
viewers	sst25vf512a-33-4i-sae: viewers · Ray	1d ago
package.json	Publish 0.1.0 · Ray	1d ago
page.json	Set visibility: public · Ray	1d ago
README.md	Publish 0.1.0 · Ray	1d ago
sst25vf512a-33-4i-sae-etched.glb	Publish 0.1.0 · Ray	1d ago
sst25vf512a-33-4i-sae-etched.step	sst25vf512a-33-4i-sae: factory component page (tier=lcsc) · Ray	1d ago
sst25vf512a-33-4i-sae-hero.glb	sst25vf512a-33-4i-sae: hero GLB from the etched model (keeps the MPN mark) · Ray	1d ago
sst25vf512a-33-4i-sae-hero.overlay.json	Publish 0.1.0 · Ray	1d ago
sst25vf512a-33-4i-sae.glb	Publish 0.1.0 · Ray	1d ago
sst25vf512a-33-4i-sae.kicad_mod	Publish 0.1.0 · Ray	1d ago
sst25vf512a-33-4i-sae.kicad_sym	Publish 0.1.0 · Ray	1d ago
sst25vf512a-33-4i-sae.lbr	Publish 0.1.0 · Ray	1d ago
sst25vf512a-33-4i-sae.step	Publish 0.1.0 · Ray	1d ago

SST25VF512A-33-4I-SAE

Microchip Tech · NOR FLASH · SOIC-8

SST25VF512A-33-4I-SAE from Microchip Tech, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	CE#	input	Chip Enable: the device is selected by a high-to-low transition on CE#, which must remain low for the duration of any command sequence.
2	SO	output	Serial Data Output: transfers data serially out of the device, shifted out on the falling edge of SCK.
3	WP#	input	Write Protect: enables or disables the BPL bit in the status register.
4	VSS	power_in	Ground reference for the device.
5	SI	input	Serial Data Input: transfers commands, addresses, or data serially into the device, latched on the rising edge of SCK.
6	SCK	input	Serial Clock: provides the timing of the serial interface, with commands, addresses, or input data latched on the rising edge and output data shifted out on the falling edge.
7	HOLD#	input	Hold: temporarily stops serial communication with the memory without resetting the device.
8	VDD	power_in	Power supply, 2.7-3.6V.

Key specifications

Parameter	Value
Manufacturer	Microchip Tech
Package	SOIC-8
Category	Memory
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Max	Unit	Conditions	Page
Read Current	IDDR		10	mA	CE#=0.1 VDD/0.9 VDD@20 MHz, SO=open	19
Program and Erase Current	IDDW		30	mA	CE#=VDD	19
Standby Current	ISB		15	µA	CE#=VDD,VIN=VDD or VSS	19
Input Leakage Current	ILI		1	µA	VIN=GND to VDD,VDD=VDD Max	19
Output Leakage Current	ILO		1	µA	VOUT=GND to VDD,VDD=VDD Max	19
Input Low Voltage	VIL		0.8	V	VDD=VDD Min	19
Output Low Voltage	VOL		0.2	V	IOL=100 µA, VDD=VDD Min	19
Supply Voltage (operating range)	VDD	2.7	3.6	V	Industrial range	19
Ambient Temperature (Industrial operating range)		-40	85	°C	Industrial range	19
Temperature Under Bias		-55	125	°C		19
Storage Temperature		-65	150	°C		19
DC Voltage on Any Pin to Ground Potential		-0.5		V		19
Transient Voltage (<20 ns) on Any Pin to Ground Potential		-2		V	<20 ns	19
Package Power Dissipation Capability			1	W	TA = 25°C	19
Surface Mount Solder Reflow Temperature			260	°C	10 seconds	19
Output Short Circuit Current			50	mA	Output shorted for no more than one second. No more than one output shorted at a time.	19
Output Pin Capacitance	COUT		12	pF	VOUT = 0V	20
Input Capacitance	CIN		6	pF	VIN = 0V	20
Endurance	NEND	10000		Cycles	JEDEC Standard A117	20
Data Retention	TDR	100		Years	JEDEC Standard A103	20
VDD Min to Read Operation	TPU-READ	10		µs		20
VDD Min to Write Operation	TPU-WRITE	10		µs		20
Serial Clock Frequency	FCLK		33	MHz	33 MHz column	21
Serial Clock High Time	TSCKH	13		ns	33 MHz column	21
Serial Clock Low Time	TSCKL	13		ns	33 MHz column	21
Serial Clock Rise Time (slew rate)	TSCKR		0.1	V/ns	33 MHz column; may be limited by TSCKH and TSCKL	21
Serial Clock Fall Time (slew rate)	TSCKF		0.1	V/ns	33 MHz column; may be limited by TSCKH and TSCKL	21
CE# Active Setup Time	TCES	12		ns	33 MHz column; relative to SCK	21
CE# Active Hold Time	TCEH	12		ns	33 MHz column; relative to SCK	21
CE# Not Active Setup Time	TCHS	10		ns	33 MHz column	21
CE# Not Active Hold Time	TCHH	10		ns	33 MHz column	21
CE# High Time	TCPH	100		ns	33 MHz column	21
CE# High to High-Z Output	TCHZ		14	ns	33 MHz column	21
SCK Low to Low-Z Output	TCLZ	0		ns	33 MHz column	21
Data In Setup Time	TDS	3		ns	33 MHz column	21
Data In Hold Time	TDH	3		ns	33 MHz column	21
HOLD# Low Setup Time	THLS	10		ns	33 MHz column	21
HOLD# High Setup Time	THHS	10		ns	33 MHz column	21
HOLD# Low Hold Time	THLH	10		ns	33 MHz column	21
HOLD# High Hold Time	THHH	10		ns	33 MHz column	21
HOLD# Low to High-Z Output	THZ		14	ns	33 MHz column	21
HOLD# High to Low-Z Output	TLZ		14	ns	33 MHz column	21
Output Hold from SCK Change	TOH	0		ns	33 MHz column	21
Output Valid from SCK	TV		12	ns	33 MHz column	21
Sector-Erase	TSE		25	ms		21
Block-Erase	TBE		25	ms		21
Chip-Erase	TSCE		100	ms		21
Byte-Program	TBP		20	µs		21

CAD (KiCad official)

Symbol: SST25VF512A-33-4I-SAE
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: sst25vf512a-33-4i-sae-etched.step / sst25vf512a-33-4i-sae-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sst25vf512a-33-4i-sae.step / sst25vf512a-33-4i-sae.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Microchip Tech datasheet (28 pp, sha256 f5630604f26960da, retrieved 2026-10-21, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF