component
SSP9480
Public Made by Adomby adom
Shanghai Siproin Microelectronics DC-DC Converters, ESOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 6d ago |
| viewers | 6d ago |
| package.json | 6d ago |
| page.json | 6d ago |
| README.md | 6d ago |
| ssp9480-etched.glb | 6d ago |
| ssp9480-etched.step | 6d ago |
| ssp9480-hero.glb | 6d ago |
| ssp9480-hero.overlay.json | 6d ago |
| ssp9480.glb | 6d ago |
| ssp9480.kicad_mod | 6d ago |
| ssp9480.kicad_sym | 6d ago |
| ssp9480.lbr | 6d ago |
| ssp9480.step | 6d ago |
SSP9480
Shanghai Siproin Microelectronics · DC-DC Converters · ESOP-8
SSP9480 from Shanghai Siproin Microelectronics, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input supply for all internal control circuits and the switching tubes, with a decoupling capacitor to ground required close to this pin to reduce switching spikes; recommended VIN range is 4.5V to 80V. |
| 2 | NC | unconnected | Not connected. |
| 3 | EN | input | Enable input: pulling it below the specified threshold (Venf 1.0V typ) disables the chip and above the enable threshold (Venr 1.4V min) enables it, and a 100K resistor to IN lets it start automatically. |
| 4 | FB | input | Feedback input to the error amplifier that sets the output voltage (internal reference 0.812V typ); when FB falls below 250mV under a short circuit, the foldback circuit reduces the oscillation frequency to keep current limiting reliable. |
| 5 | NC | unconnected | Not connected. |
| 6 | GND | power_in | Ground, to be connected as close as possible to the output capacitor and kept away from high-current switching paths. |
| 7 | BST | power_in | Bootstrap positive supply for the internal floating high-side MOSFET driver, with a bypass capacitor connected between this pin and SW (BST to SW absolute maximum 6.0V). |
| 8 | SW | output | Switch node, with a low-VF Schottky diode to ground required close to this pin to reduce switching spikes; switch voltage limited to 1V to 0.95×VIN in recommended operation. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | ESOP-8 |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (VIN) | VIN | 4.5 | 80 | V | 3 | ||
| Switch Voltage (VSW) | VSW | 1 | V | 3 | |||
| Operating Temperature | -40 | 85 | ℃ | 3 | |||
| Supply Voltage (VIN) | VIN | -0.3 | 85 | V | 3 | ||
| Switch Voltage (VSW) | VSW | -0.3 | V | 3 | |||
| BST to SW | -0.3 | 6 | V | 3 | |||
| All Other Pins | -0.3 | 6 | V | 3 | |||
| Operating Junction Temp (TJ) | TJ | -40 | 125 | ℃ | 3 | ||
| Junction Temperature | 150 | ℃ | 3 | ||||
| Lead Temperature | 260 | ℃ | 3 | ||||
| Storage Temperature | -65 | 150 | ℃ | 3 | |||
| Feedback Voltage | Vfb | 0.792 | 0.812 | 0.832 | V | 4.5<Vin<80V | 4 |
| UVLO Up Threshold | Vuvlo-r | 2.9 | 3.3 | 3.73 | V | 4 | |
| UVLO Hysteresis | Vuvlo-f | 2.65 | 3.05 | 3.45 | V | 4 | |
| Oscillator Frequency | Fosc | 380 | 480 | 580 | KHz | 4 | |
| Enable Threshold Voltage | Venr | 1.4 | V | 4 | |||
| Quiescent Current | Isq | 0.61 | 0.86 | mA | Ven=2V, Vfb=1V | 4 | |
| Shutdown Current | Isd | 0.1 | 1 | μA | Ven=0V, 4.5V<VIN<70V | 4 | |
| Upper Switch ON Resistance | Rsw | 500 | mΩ | Vbst-Vsw=5V | 4 | ||
| Upper Switch Leakage | Iswleak | 1 | μA | Ven=0V, Vsw=0V | 4 | ||
| Limiting Current | Ilim | 1.8 | A | 4 | |||
| Foldback Frequency | Fsw-f | 150 | KHz | Vfb=0V | 4 | ||
| Enable Turn-off Voltage | Venf | 1 | V | 4 | |||
| EN Input Current | Ien | 3 | μA | Ven=2V | 4 | ||
| EN Input Current | Ien | 0.1 | μA | Ven=0V | 4 | ||
| Minimum Switch ON Time | Ton min | 100 | ns | 4 | |||
| Thermal Shutdown Temp | 240 | ℃ | 4 | ||||
| Junction-to-Ambient Thermal Resistance | θJA | 50 | ℃/W | 3 | |||
| Junction-to-Case Thermal Resistance | θJC | 10 | ℃/W | 3 |
CAD (KiCad official)
- Symbol:
SSP9480 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm - 3D model: ESOP-8 (KiCad packages3D, STEP)
- 3D model files:
ssp9480-etched.step/ssp9480-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ssp9480.step/ssp9480.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Siproin Microelectronics datasheet (11 pp, sha256
e0487f7283f67c59, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).