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SSP9193-28M5R
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Shanghai Siproin Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SSP9193-28M5R
Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
SSP9193-28M5R from Shanghai Siproin Microelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage, recommended supply input range 2.5V to 5.5V. |
| 2 | GND | power_in | Ground. |
| 3 | EN | input | Active-high chip enable, high impedance input (0V to 5.5V); needs a 100kΩ pull-down to GND when the control signal is floating. |
| 4 | BP | passive | Reference noise bypass; can be left floating, connect a 22nF capacitor to GND for lowest noise. |
| 5 | VOUT | power_out | Regulated output voltage; use an output capacitor of at least 1µF close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage tolerance | Vout | -2 | 2 | % | 1 | ||
| Output Current | Iout | 400 | 500 | mA | Vin-Vout=1V | 3 | |
| Line Regulation | △Vout1 | 0.3 | % | Vin=(Vout+1) to 5.5V, Iout=1mA | 3 | ||
| Load Regulation | △Vout | 0.6 | % | Vin= Vout+1V, 1.0mA≤Iout≤300mA | 3 | ||
| Quiescent Current | Iss1 | 30 | 50 | uA | VEN≥1.2V, IOUT=0mA | 3 | |
| Standby current | ISTBY | 0.01 | 1 | uA | VEN=GND, shutdown | 3 | |
| EN Input Bias current | 0 | 100 | nA | VEN=GND or VIN | 3 | ||
| EN Threshold VIL | VIL | 0.4 | V | Vin=3V to 5.5V, shutdown | 3 | ||
| EN Threshold VIH | VIH | 1.2 | V | Vin=3V to 5.5V, strat-up | 3 | ||
| Power supply rejection rate | PSRR | 50 | dB | F=10KHz | 3 | ||
| En input voltage | VEN | 0 | 5.5 | V | 2 | ||
| Junction temperature range | TJ | -40 | 125 | ℃ | 2 | ||
| Ambient temperature range | TA | -40 | 85 | ℃ | 2 | ||
| Power supply rejection rate | PSRR | 70 | dB | F=100Hz, Cout=1uF; Iout=10mA | 3 | ||
| Output Noise | 27 | uVrms | EN BW=10Hz～100KHz | 3 | |||
| Thermal shutdown temperature | TSD | 165 | ℃ | 3 | |||
| Thermal shutdown temperature | △TSD | 30 | ℃ | 3 |
CAD (KiCad official)
- Symbol:
SSP9193-28M5R - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ssp9193-28m5r-etched.step/ssp9193-28m5r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ssp9193-28m5r.step/ssp9193-28m5r.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Siproin Microelectronics datasheet (5 pp, sha256
5f97ec3254b903c5, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SSP9193-28M5R
**Shanghai Siproin Microelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
SSP9193-28M5R from Shanghai Siproin Microelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power input voltage, recommended supply input range 2.5V to 5.5V. |
| 2 | GND | power_in | Ground. |
| 3 | EN | input | Active-high chip enable, high impedance input (0V to 5.5V); needs a 100kΩ pull-down to GND when the control signal is floating. |
| 4 | BP | passive | Reference noise bypass; can be left floating, connect a 22nF capacitor to GND for lowest noise. |
| 5 | VOUT | power_out | Regulated output voltage; use an output capacitor of at least 1µF close to the pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage tolerance | Vout | -2 | | 2 | % | | 1 |
| Output Current | Iout | | 400 | 500 | mA | Vin-Vout=1V | 3 |
| Line Regulation | △Vout1 | | | 0.3 | % | Vin=(Vout+1) to 5.5V, Iout=1mA | 3 |
| Load Regulation | △Vout | | | 0.6 | % | Vin= Vout+1V, 1.0mA≤Iout≤300mA | 3 |
| Quiescent Current | Iss1 | | 30 | 50 | uA | VEN≥1.2V, IOUT=0mA | 3 |
| Standby current | ISTBY | | 0.01 | 1 | uA | VEN=GND, shutdown | 3 |
| EN Input Bias current | | | 0 | 100 | nA | VEN=GND or VIN | 3 |
| EN Threshold VIL | VIL | | | 0.4 | V | Vin=3V to 5.5V, shutdown | 3 |
| EN Threshold VIH | VIH | 1.2 | | | V | Vin=3V to 5.5V, strat-up | 3 |
| Power supply rejection rate | PSRR | 50 | | | dB | F=10KHz | 3 |
| En input voltage | VEN | 0 | | 5.5 | V | | 2 |
| Junction temperature range | TJ | -40 | | 125 | ℃ | | 2 |
| Ambient temperature range | TA | -40 | | 85 | ℃ | | 2 |
| Power supply rejection rate | PSRR | | 70 | | dB | F=100Hz, Cout=1uF; Iout=10mA | 3 |
| Output Noise | | | 27 | | uVrms | EN BW=10Hz～100KHz | 3 |
| Thermal shutdown temperature | TSD | | 165 | | ℃ | | 3 |
| Thermal shutdown temperature | △TSD | | 30 | | ℃ | | 3 |
## CAD (KiCad official)
- Symbol: `SSP9193-28M5R`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `ssp9193-28m5r-etched.step` / `ssp9193-28m5r-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ssp9193-28m5r.step` / `ssp9193-28m5r.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shanghai Siproin Microelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588911784308977664) (5 pp, sha256 `5f97ec3254b903c5`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/ssp9193-28m5r-datasheet.pdf)