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SSP7786A-5.0V

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Shanghai Siproin Microelectronics SSP7786A 5 0V Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ssp7786a-5-0v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ssp7786a-5-0v: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ssp7786a-5-0v: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
ssp7786a-5-0v-etched.fit.json ssp7786a-5-0v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp7786a-5-0v-etched.glb ssp7786a-5-0v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp7786a-5-0v-etched.step ssp7786a-5-0v: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp7786a-5-0v.glb Publish 0.1.0 · Ray
ssp7786a-5-0v.kicad_mod Publish 0.1.0 · Ray
ssp7786a-5-0v.kicad_sym Publish 0.1.0 · Ray
ssp7786a-5-0v.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ssp7786a-5-0v.step Publish 0.1.0 · Ray

SSP7786A-5.0V

Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOP-8

SSP7786A-5.0V from Shanghai Siproin Microelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No connection. Leave floating.
2 GND power_in Ground reference for the device.
3 VOUT power_out LDO regulated output voltage (5.0V typ for the -5V variant, 4.9V/5.0V/5.1V min/typ/max). Absolute max -0.3V to 7V. Output current limited to typ 138mA (100-160mA).
4 VDD power_in Voltage input supply / energy storage node. Connect a bulk capacitor from VDD to GND (Cvdd ~= 0.01 * Iload in F) to transfer input energy to the LDO stage. VDD_ON turn-on threshold 7.6/7.8/8V; absolute max 9V.
5 Drain power_in Internal 650V power MOSFET drain. Connect to rectified AC line; provides energy to the backward stage when the input voltage drops into the charging-window interval. Pins 5, 6, 7, 8 are tied together internally to the same drain node - the PCB layout guide directs the user to connect all four pads together and maximize copper area for heat dissipation.
6 Drain power_in Internal 650V power MOSFET drain (paralleled with pins 5, 7, 8). Tie all four Drain pads together on the PCB.
7 Drain power_in Internal 650V power MOSFET drain (paralleled with pins 5, 6, 8). Tie all four Drain pads together on the PCB.
8 Drain power_in Internal 650V power MOSFET drain (paralleled with pins 5, 6, 7). Tie all four Drain pads together on the PCB.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOP-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SSP7786A-5V
  • SSP7786A-3.3V
  • SSP7786A-2.7V

CAD (KiCad official)

  • Symbol: SSP7786A-5.0V
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ssp7786a-5-0v-etched.step / ssp7786a-5-0v-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp7786a-5-0v.step / ssp7786a-5-0v.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ssp7786a-5-0v.step 122 KB You want the bare part, or you mark your own boards.
ssp7786a-5-0v-etched.step 2.5 MB You want the part with SSP7786A-5.0V already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 609 faces against 147 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (10 pp, sha256 2afb02d06a43da06, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF