component
SSP7603P50PR
Public Made by Adomby adom
Shanghai Siproin Microelectronics Linear Voltage Regulators (LDO), SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 2d ago |
| viewers | 2d ago |
| package.json | 2d ago |
| page.json | 2d ago |
| README.md | 2d ago |
| ssp7603p50pr-etched.glb | 2d ago |
| ssp7603p50pr-etched.step | 2d ago |
| ssp7603p50pr-hero.glb | 2d ago |
| ssp7603p50pr-hero.overlay.json | 2d ago |
| ssp7603p50pr.glb | 2d ago |
| ssp7603p50pr.kicad_mod | 2d ago |
| ssp7603p50pr.kicad_sym | 2d ago |
| ssp7603p50pr.lbr | 2d ago |
| ssp7603p50pr.step | 2d ago |
SSP7603P50PR
Shanghai Siproin Microelectronics · Linear Voltage Regulators (LDO) · SOT-89-3
SSP7603P50PR from Shanghai Siproin Microelectronics, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground pin (Vss) of the regulator, left-most pin in the SOT89-3 top view. |
| 2 | VIN | power_in | Input supply pin, operating input voltage 3.5V to 15V (absolute maximum supply 18V). |
| 3 | VOUT | power_out | Regulated 5.0V output (±2%) delivering up to 500mA with built-in current limiter, with recommended COUT of 1uF tantalum or 6.8uF ceramic. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOT-89-3 |
| Category | Power Management ICs |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (tolerance) | Vout | -2 | 2 | % | 1 | ||
| Input Voltage | Vin | 3.5 | 15 | V | 4 | ||
| Supply Current | Iss1 | 1 | 2 | uA | 4 | ||
| Line Regulation | △Vout1/(Vin·Vout) | 0.05 | 0.2 | %/V | 1.6V≤Vin≤8V, Iout=100mA | 4 | |
| Load Regulation | △Vout | 12 | 30 | mV | Vin= Vout+1V, 1.0mA≤Iout≤100mA | 4 | |
| Output voltage temperature coefficient | △Vout/(Ta·Vout) | -100 | 100 | ppm/℃ | Iout=30mA, 0℃≤Ta≤70℃ | 4 | |
| Dropout voltage | Vdif | 0.17 | 0.18 | V | 4.0 < Vout ≤ 5.0, Iout=100 mA | 4 | |
| Dropout voltage | Vdif | 0.2 | 0.22 | V | 4.0 < Vout ≤ 6.0, Iout=200 mA | 4 | |
| Dropout voltage | Vdif | 0.75 | 0.8 | V | 4.0 < Vout ≤ 6.0, Iout=500 mA | 4 | |
| Output Current | Iout | 500 | mA | Vin-Vout=1V | 4 | ||
| Power supply rejection ratio | PSRR | 40 | dB | F=1KHz, Vin=Vout+1V | 4 | ||
| Supply Voltage | -0.3 | 18 | V | 3 | |||
| Operating Temperature | -40 | 85 | ℃ | 3 | |||
| Storage Temperature | -40 | 125 | ℃ | 3 |
CAD (KiCad official)
- Symbol:
SSP7603P50PR - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89-3 (KiCad packages3D, STEP)
- 3D model files:
ssp7603p50pr-etched.step/ssp7603p50pr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ssp7603p50pr.step/ssp7603p50pr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Siproin Microelectronics datasheet (9 pp, sha256
3b68c21dd6651bc3, retrieved 2026-11-05, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).