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SSP7603P50MR

Public Made by Adom

by adom

Shanghai Siproin Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs ssp7603p50mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ssp7603p50mr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ssp7603p50mr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
ssp7603p50mr-etched.fit.json ssp7603p50mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp7603p50mr-etched.glb ssp7603p50mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp7603p50mr-etched.step ssp7603p50mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp7603p50mr.glb Publish 0.1.0 · Ray
ssp7603p50mr.kicad_mod Publish 0.1.0 · Ray
ssp7603p50mr.kicad_sym Publish 0.1.0 · Ray
ssp7603p50mr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ssp7603p50mr.step Publish 0.1.0 · Ray

SSP7603P50MR

Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23

SSP7603P50MR from Shanghai Siproin Microelectronics, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground / Vss return. Common reference for both the input and output rails.
2 VOUT power_out Regulated 5.0 V positive output. Rated for up to 500 mA (Vin-Vout=1 V). Requires an output capacitor (typ. 1 uF tantalum or 6.8 uF ceramic) close to the pin for stability.
3 VIN power_in Unregulated positive input supply. Operating range 3.5 V to 15 V (absolute max 18 V). Requires a 1 uF input decoupling capacitor to ground.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • SSP7603P50MRPR
  • SSP7603P50MRPG
  • SSP7603P50MR
  • SSP7603P50MRMG
  • SSP7603P50MRM5R
  • SSP7603P50MRM5G

CAD (KiCad official)

  • Symbol: SSP7603P50MR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ssp7603p50mr-etched.step / ssp7603p50mr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp7603p50mr.step / ssp7603p50mr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ssp7603p50mr.step 59 KB You want the bare part, or you mark your own boards.
ssp7603p50mr-etched.step 2.5 MB You want the part with SSP7603P50MR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 593 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (9 pp, sha256 3b68c21dd6651bc3, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF