SSP7603P30M5R
Public Made by Adomby adom
Shanghai Siproin Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
SSP7603P30M5R
Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
SSP7603P30M5R from Shanghai Siproin Microelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Unregulated supply input. Operating range 3.5V to 15V (absolute max -0.3V to 18V). A 1uF input capacitor to GND is recommended near this pin. |
| 2 | GND | power_in | Device ground / Vss reference. Return for input, output capacitors, and internal voltage reference. |
| 3 | CE | input | Chip Enable input. Active-high enables the regulator; drive low to shut down the output. Do not float. |
| 4 | NC | unconnected | No internal connection. Leave floating or tie to GND. |
| 5 | VOUT | power_out | Regulated 3.0V output (tolerance ±2%). Sources up to 500mA. A 1uF tantalum or 6.8uF ceramic output capacitor to GND is recommended for stability. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOT-23-5 |
| Category | PMIC |
| Pins | 5 |
Ordering variants
Same part, different packaging or reel option.
SSP7603P30M5RSSP7603P30M5RM5GSSP7603P30M5RPRSSP7603P30M5RPGSSP7603P30M5RMRSSP7603P30M5RMG
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy tolerance | -2 | 2 | % | 1 | |||
| Input Voltage | Vin | 3.5 | 15 | V | 4 | ||
| Line Regulation | △Vout1/(Vin·Vout) | 0.05 | 0.2 | %/V | 1.6V≤Vin≤8V, Iout=100mA | 4 | |
| Load Regulation | △Vout | 12 | 30 | mV | Vin=Vout+1V, 1.0mA≤Iout≤100mA | 4 | |
| Dropout Voltage | Vdif | 0.12 | 0.14 | V | 2.0 < Vout ≤ 3.0, Iout=80 mA | 4 | |
| Supply Current | Iss1 | 1 | 2 | uA | 4 | ||
| Output voltage temperature coefficient | △Vout/(Ta·Vout) | -100 | 100 | Ppm/℃ | Iout=30mA, 0℃≤Ta≤70℃ | 4 | |
| Supply Voltage | -0.3 | 18 | V | 3 | |||
| Operating Temperature | -40 | 85 | ℃ | 3 | |||
| Storage Temperature | -40 | 125 | ℃ | 3 |
CAD (KiCad official)
- Symbol:
SSP7603P30M5R - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
ssp7603p30m5r-etched.step/ssp7603p30m5r-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ssp7603p30m5r.step/ssp7603p30m5r.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
ssp7603p30m5r.step |
85 KB | You want the bare part, or you mark your own boards. |
ssp7603p30m5r-etched.step |
2.9 MB | You want the part with SSP7603P30M5R already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 677 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Siproin Microelectronics datasheet (9 pp, sha256
3b68c21dd6651bc3, retrieved 2026-08-17, tier: lcsc) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).