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SSP721A

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Shanghai Siproin Microelectronics RF Transceiver ICs, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentradio frequency chip-antennassp721afactory-2.0.0extractor-text

Verified SSP721A

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 16 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SSP721A · SOP-16 · 16 pins
  • ✓copper: 16 copper pads, none touching another net
  • ✓datasheet: all 16 pin names found in the 7-page datasheet
  • •distributor (warn): no ['digikey', 'mouser'] number
  • ✓family: SOIC-16_3.9x9.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-8ila51wv/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 16 pins = 16 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 16 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ssp721a.kicad_sym✓ ssp721a.kicad_mod✓ ssp721a.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8h ago
viewers ssp721a: viewers · Ray 8h ago
package.json Publish 0.1.0 · Ray 8h ago
page.json Set visibility: public · Ray 8h ago
README.md Publish 0.1.0 · Ray 8h ago
ssp721a-etched.glb Publish 0.1.0 · Ray 8h ago
ssp721a-etched.step ssp721a: factory component page (tier=lcsc) · Ray 8h ago
ssp721a-hero.glb ssp721a: hero GLB from the etched model (keeps the MPN mark) · Ray 8h ago
ssp721a-hero.overlay.json Publish 0.1.0 · Ray 8h ago
ssp721a.glb Publish 0.1.0 · Ray 8h ago
ssp721a.kicad_mod Publish 0.1.0 · Ray 8h ago
ssp721a.kicad_sym Publish 0.1.0 · Ray 8h ago
ssp721a.lbr Publish 0.1.0 · Ray 8h ago
ssp721a.step Publish 0.1.0 · Ray 8h ago
verification.json Verified: Published by the parts factory: tier lcsc, 16 pins · Ray 8h ago

SSP721A

Shanghai Siproin Microelectronics · RF Transceiver ICs · SOP-16

SSP721A from Shanghai Siproin Microelectronics, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BUSL2 passive Connects to the meter bus; the BUSL2-BUSL1 bus voltage is rated ±50 V absolute maximum, with 10.8-42 V recommended for receive and 12-42 V for transmit.
2 VB power_in Rectified bus signal node after the bridge rectifier, for which the datasheet lists a 9.3 V receive-mode input voltage condition.
3 STC passive External power-holding capacitor node, where the basic application requires CSTC above 50 µF and STC reads 5.6-6.4 V with VDD on.
4 RIDD passive Connects the external resistor that sets the CS1 current, with 13-80 kΩ recommended and bus current of 3 mA at 13 kΩ or 1.5 mA at 30 kΩ.
5 PF output Undervoltage indication output, specified at 0-0.6 V low (IPF=−1 µA) and VBAT−0.6 V high (IPF=−100 µA).
6 SC passive External sampling capacitor node, with SC charge current specified at −15 µA minimum and −40 µA typical.
7 TXI output Inverted data signal output, with VOL at most 0.5 V and VOH at least VBAT−0.6 V under 100 µA load.
8 TX output Data signal output, with VOL at most 0.5 V and VOH at least VBAT−0.6 V under 100 µA load.
9 BAT input Logic-level adjustment input, recommended at 2.5-3.8 V, must not exceed VSTC−1 V, and is absolute-rated to −0.3 to 5.5 V.
10 VS power_in Output that switches between bus-powered and battery-powered supply modes, with output resistance of 0.3-1 MΩ when VDD is off.
11 VDD power_out Regulated supply output of 3.1-3.4 V at 1 mA with STC at 6.5 V, and output resistance of 5 Ω for 2-8 mA.
12 RX input Data signal input, with absolute range −0.3 to 5.5 V, high level of VBAT−0.8 V minimum (up to 5.5 V when VSTC≥6.5 V), and low level of 0.8 V maximum.
13 RXI input Inverted data signal input, with absolute range −0.3 to 5.5 V and input current of 10-40 µA when VRXI=VBAT=3 V.
14 RIS passive Connects the external modulation-current setting resistor, with a minimum of 100 Ω, giving 11.5-19.5 mA modulation current at 100 Ω.
15 GND power_in Ground reference; all voltages in the datasheet are referenced to the GND pin.
16 BUSL1 passive Connects to the meter bus as the other end of the BUSL2-BUSL1 pair, which is rated ±50 V absolute maximum.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOP-16
Category Radio Frequency Chip/Antenna
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
仪表总线间电压（BUSL2-BUSL1） VMB -50 50 V 2
数据信号输入端 RX RX -0.3 5.5 V 2
数据信号反相输入端 RXI RXI -0.3 5.5 V 2
逻辑电平调整输入端 BAT BAT -0.3 5.5 V 2
工作结温 TJ -25 150 ℃ 2
工作环境温度 TA -25 85 ℃ 2
贮存温度 TSTG -65 150 ℃ 2
热阻（结到环境） 8 mW/℃ 2
仪表总线间电压（BUSL2-BUSL1）接收 VMB 10.8 42 V 接收 2
仪表总线间电压（BUSL2-BUSL1）发送 VMB 12 42 V 发送 2
输入电压 VB（接收） VI 9.3 V VB（接收） 2
输入电压 BAT VI 2.5 3.8 V BAT 注 2 2
外接 CS1 电流值调节电阻 RRIDD 13 80 KΩ 2
外接调制电流值调节电阻 RRIS 100 Ω 2
工作环境温度（推荐） TA -25 80 ℃ 2
整流桥 BR 上的压降 ΔVBR 1.5 V IBUS=3mA 3
电流源 CS1 上的压降 ΔVCS1 1.8 V RRIDD=13kΩ 3
总线电流 IBUS 3 mA VSTC=6.5V, IMC=0mA, RRIDD=13kΩ 3
总线电流 IBUS 1.5 mA VSTC=6.5V, IMC=0mA, RRIDD=30kΩ 3
总线电流精度 ΔIBUS 2 % ΔVBUS=10V, IMC=0mA, RRIDD=13～30kΩ 3
供电电流 ICC 650 μA VSTC=6.5V, IMC=0mA, VBAT=3.8V, RRIDD=13kΩ (注 2) 3
CI1 电流 ICI1 350 μA VSTC=6.5V, IMC=0mA, VBAT=3.8V, RRIDD=13kΩ, VBUS=6.5V, RX/RXI=off (注 2) 3
BAT 端电流 IBAT -0.5 0.5 μA 3
BAT 端与 VDD 端电流和 IBAT=IVDD -0.5 0.5 μA VBUS=0V, VSTC=0V 3
VDD 端电压 VVDD 3.1 3.4 V -IVDD=1mA, VSTC=6.5V 3
VDD 电阻 RVDD 5 Ω -IVDD=2～8mA, VSTC=4.5V 3
STC 电压 VCTC 5.6 6.4 V VDD=on, VS=on 3
STC 电压 VCTC 3.8 4.3 V VDD=off, VS=off 3
STC 电压 VCTC 6.5 7.5 V IVDD<ISTC_USE 3
STC 电流 ISTC_USE 1.85 2.4 mA VSTC=5V, RRIDD=13kΩ 3
STC 电流 ISTC_USE 0.65 1.1 mA VSTC=5V, RRIDD=30kΩ 3
RIDD 端电压 VRIDD 1.23 1.33 V RRIDD=30kΩ 3
VS 电阻 RVS 0.3 1 MΩ VDD=off 3
PF 电压 VPF 0 0.6 V VVB=VSTC+0.3V, IPF=-1μA 3
PF 电压 VPF 0 0.9 V VVB=VSC+0.3V, IPF=5μA 3
启动时间 ton 3 s CSTC=50μF, 总线电压上升速率：1V/μs 3
SC 充电电流 ISC_charge -40 -15 μA VSC=24V, VVB=36V 4
SC 放电电流 ISC_discharge 0.3 μA VSC=VVB=24V 4
TX/TXI 端输出低电平 VOL 0 0.5 V ITX/ITXI=100μA 4
TX/TXI 端输出低电平 VOL 0 1.5 V ITX=1.1mA 4
TX/TXI 电流 ITX/ITXI 10 μA VTX=7.5V, VVB=12V, VSTC=6V, VBAT=3.8V 4
调制电流 IMC 11.5 19.5 mA RRIS=100Ω 4
RIS 端电压 VRIS 1.4 1.7 V RRIS=100Ω 4
RIS 端电压 VRIS 1.5 1.8 V RRIS=1kΩ 4
RX/RXI 端输入高电平电压 VIH 5.5 V 注 2 4
RX/RXI 端输入低电平电压 YIL 0 0.8 V 4
RX 电流 IRX -40 -10 μA VRX=0, VBAT=3V, VSTC=6.5V 4
RXI 电流 IRXI 10 40 μA VRXI=VBAT=3V, VVB=VSTC=0V 4

CAD (KiCad official)

  • Symbol: SSP721A
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOP-16 (KiCad packages3D, STEP)
  • 3D model files: ssp721a-etched.step / ssp721a-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp721a.step / ssp721a.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (7 pp, sha256 f1f4ce622db7684a, retrieved 2026-11-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF