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SSP7212-ADJ

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Shanghai Siproin Microelectronics Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

Schematic Symbol

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PCB Footprint

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Datasheet

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Contents

README

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SSP7212-ADJ

Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

SSP7212-ADJ from Shanghai Siproin Microelectronics, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply input, 2.0V to 8V operating range (absolute max VSS+6V per Abs Max table). Bypass with 1µF ceramic to VSS.
2 VSS power_in Ground reference for the regulator.
3 CE input Chip enable input. Active-high (VCEH ≥ 0.8V enables, VCEL ≤ 0.75V disables). Input leakage ±0.1µA. Shutdown current <0.1µA when CE = VSS.
4 FB input Feedback input to the error amplifier. Regulates to VFB = 0.8V (typ, 790-810mV). Set Vout = (1 + R1/R2) × 0.8V; R1 and R2 should be > 100kΩ.
5 VOUT power_out Regulated voltage output, up to 300mA when VIN ≥ VOUT+1V. Requires 1µF ceramic output capacitor for stability.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOT-23-5
Category PMIC
Pins 5

Ordering variants

Same part, different packaging or reel option.

  • SSP7212-ADJM5

CAD (KiCad official)

  • Symbol: SSP7212-ADJ
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: ssp7212-adj-etched.step / ssp7212-adj-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp7212-adj.step / ssp7212-adj.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ssp7212-adj.step 85 KB You want the bare part, or you mark your own boards.
ssp7212-adj-etched.step 1.9 MB You want the part with SSP7212-ADJ already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 462 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (6 pp, sha256 7a394e38019cd892, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF