SSP62FJ5002PR

Shanghai Siproin Microelectronics · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3L

SSP62FJ5002PR from Shanghai Siproin Microelectronics, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VSS	power_in	Ground pin of the regulator (VSS), connected to the voltage reference and feedback network.
2	VIN	power_in	Input supply voltage pin; absolute maximum -0.3V to 15V, recommended input voltage up to 13V.
3	VOUT	power_out	Regulated 5.0V output (±2%) for the SSP62FJ5002PR, with output current of 350mA typical at Vin-Vout=1V and a built-in current limiter.

Key specifications

Parameter	Value
Manufacturer	Shanghai Siproin Microelectronics
Package	SOT-89-3L
Category	Power Management (PMIC)
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Output voltage accuracy (tolerance)	Vout	-2		2	%	Vin=Vout+1V; 1.0mA≤Iout≤30mA	3
Line regulation			0.05	0.2	%/V	1.6V≤Vin≤8V; Iout=100mA	3
Load regulation	△Vout		12	30	mV	Vin= Vout+1V; 1.0mA≤Iout≤100mA	3
Output voltage temperature coefficient		-100		100	Ppm/℃	Iout=30mA; 0℃≤Ta≤70℃	3
Supply current	Iss1		1.5	2.5	uA		3
Input voltage	Vin			13	V		3
Low dropout voltage (5.0V variant, 100 mA)	Vdrop		0.16	0.18	V	Iout=100 mA; 4.0 < Vout ≤ 5.0	3
Low dropout voltage (5.0V variant, 200 mA)	Vdrop		0.3	0.32	V	Iout=200 mA; 4.0 < Vout ≤ 6.0	3
Low dropout voltage (5.0V variant, 350 mA)	Vdrop		0.51	0.54	V	Iout=350 mA; 4.0 < Vout ≤ 6.0	3
Supply Voltage		-0.3		15	V		2
Operating Temperature		-40		85	℃		2
Storage Temperature		-40		125	℃		2

CAD (KiCad official)

Symbol: SSP62FJ5002PR
Footprint: Package_TO_SOT_SMD:SOT-89-3
3D model: SOT-89-3L (KiCad packages3D, STEP)
3D model files: ssp62fj5002pr-etched.step / ssp62fj5002pr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp62fj5002pr.step / ssp62fj5002pr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Shanghai Siproin Microelectronics datasheet (5 pp, sha256 0e8991e7e4161c84, retrieved 2026-10-18, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# SSP62FJ5002PR

**Shanghai Siproin Microelectronics** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3L

SSP62FJ5002PR from Shanghai Siproin Microelectronics, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground pin of the regulator (VSS), connected to the voltage reference and feedback network. |
| 2 | VIN | power_in | Input supply voltage pin; absolute maximum -0.3V to 15V, recommended input voltage up to 13V. |
| 3 | VOUT | power_out | Regulated 5.0V output (±2%) for the SSP62FJ5002PR, with output current of 350mA typical at Vin-Vout=1V and a built-in current limiter. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SOT-89-3L |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (tolerance) | Vout | -2 |  | 2 | % | Vin=Vout+1V; 1.0mA≤Iout≤30mA | 3 |
| Line regulation |  |  | 0.05 | 0.2 | %/V | 1.6V≤Vin≤8V; Iout=100mA | 3 |
| Load regulation | △Vout |  | 12 | 30 | mV | Vin= Vout+1V; 1.0mA≤Iout≤100mA | 3 |
| Output voltage temperature coefficient |  | -100 |  | 100 | Ppm/℃ | Iout=30mA; 0℃≤Ta≤70℃ | 3 |
| Supply current | Iss1 |  | 1.5 | 2.5 | uA |  | 3 |
| Input voltage | Vin |  |  | 13 | V |  | 3 |
| Low dropout voltage (5.0V variant, 100 mA) | Vdrop |  | 0.16 | 0.18 | V | Iout=100 mA; 4.0 < Vout ≤ 5.0 | 3 |
| Low dropout voltage (5.0V variant, 200 mA) | Vdrop |  | 0.3 | 0.32 | V | Iout=200 mA; 4.0 < Vout ≤ 6.0 | 3 |
| Low dropout voltage (5.0V variant, 350 mA) | Vdrop |  | 0.51 | 0.54 | V | Iout=350 mA; 4.0 < Vout ≤ 6.0 | 3 |
| Supply Voltage |  | -0.3 |  | 15 | V |  | 2 |
| Operating Temperature |  | -40 |  | 85 | ℃ |  | 2 |
| Storage Temperature |  | -40 |  | 125 | ℃ |  | 2 |

## CAD (KiCad official)

- Symbol: `SSP62FJ5002PR`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89-3L (KiCad packages3D, STEP)
- 3D model files: `ssp62fj5002pr-etched.step` / `ssp62fj5002pr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ssp62fj5002pr.step` / `ssp62fj5002pr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Shanghai Siproin Microelectronics datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588945362862690304) (5 pp, sha256 `0e8991e7e4161c84`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ssp62fj5002pr-datasheet.pdf)