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SSP62FJ4002PR

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Shanghai Siproin Microelectronics Linear Voltage Regulators (LDO), SOT-89-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SSP62FJ4002PR

Shanghai Siproin Microelectronics · Linear Voltage Regulators (LDO) · SOT-89-3L

SSP62FJ4002PR from Shanghai Siproin Microelectronics, in a SOT-89-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground pin of the regulator, the reference return for the 4.0V output version.
2 VIN power_in Positive supply input with an absolute maximum of -0.3V to 15V and a stated input voltage of 13V.
3 VOUT power_out Regulated 4.0V output with ±2% tolerance, supplying typically 350mA at Vin-Vout=1V and protected by a built-in current limiter.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOT-89-3L
Category Power Management ICs
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage accuracy (tolerance) Vout -2 2 % Vin=Vout+1V, 1.0mA≤Iout≤30mA; printed as Vout×0.98 to Vout×1.02; order code 02 = ±2% 3
Input Voltage Vin 13 V 3
Supply Voltage -0.3 15 V 2
Operating Temperature -40 85 ℃ 2
Storage Temperature -40 125 ℃ 2
Line Regulation 0.05 0.2 %/V 1.6V≤Vin≤8V, Iout=100mA 3
Load Regulation ΔVout 12 30 mV Vin= Vout+1V, 1.0mA≤Iout≤100mA 3
Output voltage temperature coefficient -100 100 Ppm/℃ Iout=30mA, 0℃≤Ta≤70℃; printed as ±100 3
Supply Current Iss1 1.5 2.5 uA 3
Dropout Voltage Vdrop 0.2 0.24 V 3.0 < Vout ≤ 4.0, Iout=100 mA 3
Dropout Voltage Vdrop 0.42 0.44 V 3.0 < Vout ≤ 4.0, Iout=200 mA 3
Dropout Voltage Vdrop 0.73 0.76 V 3.0 < Vout ≤ 4.0, Iout=350 mA 3
Output Current Iout 350 mA Vin-Vout=1V 3
Power Supply Rejection Ratio PSRR 40 dB F=1KHz, Vin=Vout+1V 3

CAD (KiCad official)

  • Symbol: SSP62FJ4002PR
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3L (KiCad packages3D, STEP)
  • 3D model files: ssp62fj4002pr-etched.step / ssp62fj4002pr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp62fj4002pr.step / ssp62fj4002pr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (5 pp, sha256 0e8991e7e4161c84, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF