SSP61CN4002MR

{
  "schema_version": 1,
  "type": "component",
  "slug": "ssp61cn4002mr",
  "title": "SSP61CN4002MR",
  "brief": "Shanghai Siproin Microelectronics Supervisor And Reset ICs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "power management (pmic)",
    "ssp61cn4002mr",
    "factory-2.0.0",
    "extractor-text"
  ],
  "component": {
    "mpn": "SSP61CN4002MR",
    "manufacturer": "Shanghai Siproin Microelectronics",
    "package": "SOT-23",
    "pin_count": 3,
    "category": "Power Management (PMIC)",
    "subcategory": "Supervisor And Reset ICs",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586200465898426368",
    "parts": {
      "symbol": "ssp61cn4002mr.kicad_sym",
      "footprint": "ssp61cn4002mr.kicad_mod",
      "model_3d": "ssp61cn4002mr-hero.glb",
      "model_3d_plain": "ssp61cn4002mr-etched.glb",
      "model_3d_step": "ssp61cn4002mr-etched.step",
      "model_3d_step_plain": "ssp61cn4002mr.step",
      "lbr": "ssp61cn4002mr.lbr"
    },
    "distributor_links": {
      "lcsc": "C277910"
    },
    "distributor_check": {
      "checked_at": "2026-10-18T14:16:01Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "quota"
      },
      "mouser": {
        "pn": null,
        "status": "quota"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VOUT",
        "type": "output",
        "description": "Detector output: for this NMOS open-drain part the output is high-impedance when VDD is above VDET(+) and pulled to VSS when VDD is at or below VDET(-), with minimum output sink current IOL of 0.5 mA at VDD = 2 V and VOUT = 0.2 V."
      },
      {
        "number": "2",
        "name": "GND",
        "type": "power_in",
        "description": "Ground connection for the device."
      },
      {
        "number": "3",
        "name": "VIN",
        "type": "power_in",
        "description": "Supply voltage input: absolute maximum rating is -0.3 V to 8.0 V, and the operating voltage range is 0.7 V to 10 V."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The MPN SSP61CN4002MR is not printed in the order table. Its fields were decoded from the datasheet'; The VOUT output-stage type is listed as 'Output' only. The datasheet describes both CMOS and NMOS op; The datasheet's pin assignment table gives only a one-line description for each pin. The GND descrip"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0343,
        "at": "2026-10-18T14:13:50"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586200465898426368",
        "pages": 10,
        "sha256": "49887c43b8edefc9",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 3,
        "described": 3,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "ssp61cn4002mr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.5,
          3,
          1.2
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "dd5d1711204e1d8d26cd11490923bd84340820baa69538c385a4300ec2539bc0",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "ssp61cn4002mr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          2.5,
          3,
          1.2
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "61845707d5d1b7880d83230e5bec0a2c65e1a97213232064ae254d52f148e8c7",
        "checked": "2026-10-18",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Shanghai Siproin Microelectronics",
      "Package": "SOT-23",
      "Category": "Power Management (PMIC)",
      "Pins": "3"
    }
  },
  "variants": [],
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "ssp61cn4002mr"
  ],
  "discovery_pitch": "SSP61CN4002MR (Shanghai Siproin Microelectronics) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "ssp61cn4002mr.kicad_sym",
    "ssp61cn4002mr.kicad_mod",
    "ssp61cn4002mr.glb",
    "ssp61cn4002mr.step",
    "ssp61cn4002mr.lbr",
    "docs/hero.png",
    "docs/ssp61cn4002mr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "ssp61cn4002mr-hero.glb",
    "ssp61cn4002mr-hero.overlay.json",
    "ssp61cn4002mr-etched.glb"
  ],
  "visibility": {
    "public": true
  }
}