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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs ssp61cc1802mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json ssp61cc1802mr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray
README.md ssp61cc1802mr: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray
ssp61cc1802mr-etched.fit.json ssp61cc1802mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp61cc1802mr-etched.glb ssp61cc1802mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp61cc1802mr-etched.step ssp61cc1802mr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
ssp61cc1802mr.glb Publish 0.1.0 · Ray
ssp61cc1802mr.kicad_mod Publish 0.1.0 · Ray
ssp61cc1802mr.kicad_sym Publish 0.1.0 · Ray
ssp61cc1802mr.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
ssp61cc1802mr.step Publish 0.1.0 · Ray

SSP61CC1802MR

Shanghai Siproin Microelectronics · Supervisor and Reset ICs · SOT-23

SSP61CC1802MR from Shanghai Siproin Microelectronics, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT output Detector output. CMOS push-pull driver (for the 'CC' CMOS-output variant): high-impedance when VIN > VDET(+), driven to VSS (low) when VIN <= VDET(-). Guaranteed to sink IOL >= 0.5 mA at VOUT = 0.2 V with VIN = 2 V.
2 GND power_in Ground / VSS reference for the device.
3 VIN power_in Supply and sense input. Operating voltage 0.7 V to 10 V; absolute maximum -0.3 V to +8.0 V. Detection threshold VDET = 1.8 V (±2%) with typical hysteresis 0.05 * VDET. Typical operating current ~0.8 uA at VIN = 2.0 V.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • SSP61CC1802MRM
  • SSP61CC1802MRN

CAD (KiCad official)

  • Symbol: SSP61CC1802MR
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ssp61cc1802mr-etched.step / ssp61cc1802mr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp61cc1802mr.step / ssp61cc1802mr.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
ssp61cc1802mr.step 59 KB You want the bare part, or you mark your own boards.
ssp61cc1802mr-etched.step 2.6 MB You want the part with SSP61CC1802MR already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 613 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (10 pp, sha256 49887c43b8edefc9, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF