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SSP5842ED

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Shanghai Siproin Microelectronics Digital Isolators, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SSP5842ED

Shanghai Siproin Microelectronics · Digital Isolators · SOIC-16-300mil

SSP5842ED from Shanghai Siproin Microelectronics, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VDD1 power_in Input-side supply; recommended range 2.5 V to 5.5 V, absolute maximum -0.5 V to 6 V.
2 GND1 power_in Ground for the input-side (VDD1) domain.
3 INA input Digital signal input channel A; VIH minimum 2.0 V, VIL maximum 0.8 V.
4 INB input Digital signal input channel B; VIH minimum 2.0 V, VIL maximum 0.8 V.
5 OUTC output Digital signal output channel C; VOH minimum VDD-0.4 V at -4 mA and VOL maximum 0.4 V at 4 mA.
6 OUTD output Digital signal output channel D; VOH minimum VDD-0.4 V at -4 mA and VOL maximum 0.4 V at 4 mA.
7 EN1/NC input Output enable 1, active high, default high on the EN variant; NC defaults to enabled on the NC variant.
8 GND1 power_in Ground for the input-side (VDD1) domain.
9 GND2 power_in Ground for the output-side (VDD2) domain.
10 EN2/NC input Output enable 2, active high, default high on the EN variant; NC defaults to enabled on the NC variant.
11 IND input Digital signal input channel D; VIH minimum 2.0 V, VIL maximum 0.8 V.
12 INC input Digital signal input channel C; VIH minimum 2.0 V, VIL maximum 0.8 V.
13 OUTB output Digital signal output channel B; VOH minimum VDD-0.4 V at -4 mA and VOL maximum 0.4 V at 4 mA.
14 OUTA output Digital signal output channel A; VOH minimum VDD-0.4 V at -4 mA and VOL maximum 0.4 V at 4 mA.
15 GND2 power_in Ground for the output-side (VDD2) domain.
16 VDD2 power_in Output-side supply; recommended range 2.5 V to 5.5 V, absolute maximum -0.5 V to 6 V.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOIC-16-300mil
Category Signal Isolation Devices
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Nominal output impedance tolerance -40 40 % Footnote 1: nominal output impedance 50Ω±40% 7
Operating temperature TA -40 25 125 ℃ 6
Supply voltage VDD1 VDD1 2.5 5.5 V 6
Supply voltage VDD2 VDD2 2.5 5.5 V 6
Supply voltage (Vdd1, Vdd2) Vdd1, Vdd2 -0.5 6 V 6
Input voltage Vin -0.5 V Upper limit printed as Vdd1/Vdd2+0.5V (not a fixed number); note 2: input voltage max must not exceed 6 V 6
Junction temperature 150 ℃ 6
Pin temperature 260 ℃ 6
Storage temperature -65 150 ℃ 6
VDD Undervoltage Threshold (rising) VDDUV+ 1.9 2.2 2.37 V VDD1, VDD2 rising 7
VDD Undervoltage Threshold (falling) VDDUV- 1.85 2.12 2.32 V VDD1, VDD2 falling 7
VDD Undervoltage Hysteresis VDDHYS 50 70 95 mV 7
Positive-Going Input Threshold VT+ 1.4 1.6 1.9 V All inputs rising 7
Negative-Going Input Threshold VT- 1 1.3 1.4 V All inputs falling 7
Input Hysteresis VHYS 0.38 0.44 0.5 V 7
High Level Input Voltage VIH 2 V 7
Low Level Input Voltage VIL 0.8 V 7
Low Level Output Voltage VOL 0.2 0.4 V lol = 4 mA 7
Input Leakage Current IL -10 10 µA 7
Maximum Data Rate 0 150 Mbps 7
Minimum Pulse Width 5 ns 7
Propagation Delay tPHL, tPLH 5 9 15 ns 示意图见 9.3 7
Pulse Width Distortion PWD 0.2 4.5 ns /tPLH, tPHL/; 示意图见 9.3 7
Propagation Delay Skew tPSK(P-P) 2 4.5 ns 7
Channel-Channel Skew tPSK 0.4 2.5 ns 7
Output Rise Time tr 2.2 4 ns CL =15 pF; 示意图见 9.3 7
Output Fall Time tf 2.2 4 ns CL = 15 pF; 示意图见 9.3 7
Common Mode Transient Immunity CMTI 35 50 kV/µs VI=VDD or 0, VCM =1500 V 7
Enable to Data Valid ten1 5 12 ns 示意图 9.2 7
Enable to Data Tri-State ten2 65 98 us 7
Input power loss to valid default output tSD 28 45 ns 7
Start-up Time tSU 15 45 µs 7
Output Impedance ZO 50 Ω 7
Enable Input Current IENH, IENL 2 µA VEN = VIH or VIL 7
Peak Eye Diagram Jitter tJIT(PK) 350 ps 7
DC Supply Current VDD1 (2.5 V / 3.3 V / 5 V) VDD1 1.5 3 mA VDD=2.5 V ±5% or 3.3 V ±10% or 5 V ±10%, TA=-40~125℃; VI = 0(Bx), 1(Ex) 8
DC Supply Current VDD2 (2.5 V / 3.3 V / 5 V) VDD2 1.5 3 mA VDD=2.5 V ±5% or 3.3 V ±10% or 5 V ±10%, TA=-40~125℃; VI = 0(Bx), 1(Ex) 8
DC Supply Current VDD1 (2.5 V / 3.3 V / 5 V) VDD1 5 6.8 mA VDD=2.5 V ±5% or 3.3 V ±10% or 5 V ±10%, TA=-40~125℃; VI = 1(Bx), 0(Ex) 8
DC Supply Current VDD2 (2.5 V / 3.3 V / 5 V) VDD2 5 6.8 mA VDD=2.5 V ±5% or 3.3 V ±10% or 5 V ±10%, TA=-40~125℃; VI = 1(Bx), 0(Ex) 8
1 Mbps Supply Current VDD1 (5 V) VDD1 3.5 4.8 mA VDD=5 V ±10%, TA=-40~125℃; All Inputs = 500 kHz Square Wave, CL= 15 pF on All Outputs 9
1 Mbps Supply Current VDD2 (5 V) VDD2 3.5 4.8 mA VDD=5 V ±10%, TA=-40~125℃; All Inputs = 500 kHz Square Wave, CL= 15 pF on All Outputs 9
10 Mbps Supply Current VDD1 (5 V) VDD1 5 5.8 mA VDD=5 V ±10%, TA=-40~125℃; All Inputs = 5 MHz Square Wave, CL= 15 pF on All Outputs 9
10 Mbps Supply Current VDD2 (5 V) VDD2 5 5.8 mA VDD=5 V ±10%, TA=-40~125℃; All Inputs = 5 MHz Square Wave, CL= 15 pF on All Outputs 9
100 Mbps Supply Current VDD1 (5 V) VDD1 19 22.8 mA VDD=5 V ±10%, TA=-40~125℃; All Inputs = 50MHz Square Wave, CL= 15 pF on All Outputs 9
100 Mbps Supply Current VDD2 (5 V) VDD2 19 22.8 mA VDD=5 V ±10%, TA=-40~125℃; All Inputs = 50MHz Square Wave, CL= 15 pF on All Outputs 9
1 Mbps Supply Current VDD1 (3.3 V) VDD1 3.5 4.8 mA VDD=3.3 V ±10%, TA=-40~125℃; All Inputs = 500 kHz Square Wave, CL= 15 pF on All Outputs 10
1 Mbps Supply Current VDD2 (3.3 V) VDD2 3.5 4.8 mA VDD=3.3 V ±10%, TA=-40~125℃; All Inputs = 500 kHz Square Wave, CL= 15 pF on All Outputs 10
10 Mbps Supply Current VDD1 (3.3 V) VDD1 4.5 5.5 mA VDD=3.3 V ±10%, TA=-40~125℃; All Inputs = 5 MHz Square Wave, CL= 15 pF on All Outputs 10
10 Mbps Supply Current VDD2 (3.3 V) VDD2 4.5 5.5 mA VDD=3.3 V ±10%, TA=-40~125℃; All Inputs = 5 MHz Square Wave, CL= 15 pF on All Outputs 10
100 Mbps Supply Current VDD1 (3.3 V) VDD1 14 16.8 mA VDD=3.3 V ±10%, TA=-40~125℃; All Inputs = 50MHz Square Wave, CL= 15 pF on All Outputs 10
100 Mbps Supply Current VDD2 (3.3 V) VDD2 14 16.8 mA VDD=3.3 V ±10%, TA=-40~125℃; All Inputs = 50MHz Square Wave, CL= 15 pF on All Outputs 10
1 Mbps Supply Current VDD1 (2.5 V) VDD1 3.3 4.8 mA VDD=2.5 V ±5%, TA=-40~125℃; All Inputs = 500 kHz Square Wave, CL= 15 pF on All Outputs 11
1 Mbps Supply Current VDD2 (2.5 V) VDD2 3.3 4.8 mA VDD=2.5 V ±5%, TA=-40~125℃; All Inputs = 500 kHz Square Wave, CL= 15 pF on All Outputs 11
10 Mbps Supply Current VDD1 (2.5 V) VDD1 4.2 5.3 mA VDD=2.5 V ±5%, TA=-40~125℃; All Inputs = 5 MHz Square Wave, CL= 15 pF on All Outputs 11
10 Mbps Supply Current VDD2 (2.5 V) VDD2 4.2 5.3 mA VDD=2.5 V ±5%, TA=-40~125℃; All Inputs = 5 MHz Square Wave, CL= 15 pF on All Outputs 11
100 Mbps Supply Current VDD1 (2.5 V) VDD1 11.3 13.2 mA VDD=2.5 V ±5%, TA=-40~125℃; All Inputs = 50MHz Square Wave, CL= 15 pF on All Outputs 11
100 Mbps Supply Current VDD2 (2.5 V) VDD2 11.3 13.2 mA VDD=2.5 V ±5%, TA=-40~125℃; All Inputs = 50MHz Square Wave, CL= 15 pF on All Outputs 11

CAD (KiCad official)

  • Symbol: SSP5842ED
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
  • 3D model files: ssp5842ed-etched.step / ssp5842ed-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp5842ed.step / ssp5842ed.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (14 pp, sha256 1c35b3795786c133, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF