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SSP54123

Public Made by Adom

by adom

Shanghai Siproin Microelectronics Supervisor and Reset ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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SSP54123

Shanghai Siproin Microelectronics · Supervisor and Reset ICs · SOP-8

SSP54123 from Shanghai Siproin Microelectronics, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VR input Reference voltage terminal. One of the differential amplifier inputs; the leakage-transformer signal is applied differentially between VR (pin 1) and IN (pin 2). Trip voltage VR-Vi is 6.1 mV typ.
2 IN input Input terminal. Second differential amplifier input; combined with VR (pin 1) forms the leakage-current sense input. Absolute-max current 20 mA (pulsed) between VR and IN.
3 GND power_in Ground / return terminal for supply and all internal circuitry.
4 OD output Differential amplifier output terminal. Sets operating time via an external capacitor to GND (0.047 μF gives TON = 5 ms typ.). Per application notes, pin 4 and pin 5 may be shorted or left unconnected.
5 INLA input Latch input terminal. Trips the internal latch when driven above VLAON (0.7 V min, 1.4 V max). Absolute-max input current 5 mA; input current ILAON = 5 μA typ. at VS = 12 V. Must be connected to external filter capacitor C3.
6 NR passive Terminal for noise absorption. External bypass/filter capacitor node used to improve anti-interference and EMC performance.
7 OS output Output terminal, drives the external SCR/TRIAC gate to trip the breaker. Output current IO = -100 to -250 μA (source in latched state); low-level sink IOL = 200-800 μA at VOS = 0.2 V. Requires external capacitor to GND (0.047 μF-1 μF).
8 VS power_in Supply voltage terminal. Recommended VS >= 12 V when latch circuit is off-state; internal input clamp voltage VICL = 14 V typ. External bypass capacitor CVS = 1-2.2 μF between VS and GND. Supply current IS1 = 300 μA typ (max 500 μA); IS2 (latched) 700-900 μA.

Key specifications

Parameter Value
Manufacturer Shanghai Siproin Microelectronics
Package SOP-8
Category PMIC
Pins 8

Ordering variants

Same part, different packaging or reel option.

  • SSP54123S
  • SSP54123D

CAD (KiCad official)

  • Symbol: SSP54123
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: ssp54123-etched.step / ssp54123-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssp54123.step / ssp54123.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shanghai Siproin Microelectronics datasheet (9 pp, sha256 88f6dc5179aca346, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF