component
SSP485N
Public Made by Adomby adom
Shanghai Siproin Microelectronics RS-485 / RS-422 ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
main
Ray
ssp485n: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
07f76ec
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{
"schema_version": 1,
"type": "component",
"slug": "ssp485n",
"title": "SSP485N",
"brief": "Shanghai Siproin Microelectronics RS-485 / RS-422 ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
"version": "0.2.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"interface",
"ssp485n"
],
"component": {
"mpn": "SSP485N",
"manufacturer": "Shanghai Siproin Microelectronics",
"package": "SOP-8",
"pin_count": 8,
"category": "Interface",
"subcategory": "RS-485 / RS-422 ICs",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/e50d2f88ccbbee28e6f3d4c68f46fd9a.pdf",
"parts": {
"symbol": "ssp485n.kicad_sym",
"footprint": "ssp485n.kicad_mod",
"model_3d": "ssp485n-etched.glb",
"model_3d_plain": "ssp485n.glb",
"model_3d_step": "ssp485n-etched.step",
"model_3d_step_plain": "ssp485n.step",
"lbr": "ssp485n.lbr"
},
"distributor_links": {
"lcsc": "C2758009"
},
"pins": [
{
"number": "1",
"name": "RO",
"type": "output",
"description": "Receiver output. When RE is low, RO is driven high if A-B >= +0.1V, low if A-B <= -0.1V, and high (fail-safe) if A/B are open or shorted. Output logic sense inverts automatically if A and B are physically swapped on the bus (polarity adaptation)."
},
{
"number": "2",
"name": "RE",
"type": "input",
"description": "Receiver output enable, active low. RO is enabled when RE is low; RO is high-impedance when RE is high. Typically tied low for continuous receive, or driven by the same MCU pin as DE for half-duplex direction control."
},
{
"number": "3",
"name": "DE",
"type": "input",
"description": "Driver output enable, active high. Bus outputs A and B are enabled when DE is high; both go high-impedance when DE is low. Commonly tied to /RE for MCU-driven half-duplex TX/RX steering."
},
{
"number": "4",
"name": "DI",
"type": "input",
"description": "Driver input (TTL/CMOS). With DE high and A wired to bus A: DI low drives A low and B high; DI high drives A high and B low. Logic sense inverts automatically when A/B are physically swapped on the bus (polarity adaptation)."
},
{
"number": "5",
"name": "GND",
"type": "power_in",
"description": "Ground reference for logic and bus signaling. Connect to the local 0V rail; in isolated networks it becomes the 485GND reference for pull-up/pull-down bias network."
},
{
"number": "6",
"name": "A",
"type": "bidirectional",
"description": "Non-inverting RS-485 bus line: receiver input and driver output. Absolute voltage rating -13 V to +15 V; differential threshold ±100 mV; receiver input resistance >=96 kOhm (1/8 unit load). Polarity assignment relative to B is auto-detected 78 ms after power-on."
},
{
"number": "7",
"name": "B",
"type": "bidirectional",
"description": "Inverting RS-485 bus line: receiver input and driver output. Absolute voltage rating -13 V to +15 V; complementary to A. Polarity relative to A is determined automatically by the on-chip polarity-adaptation circuit."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Positive supply, +5V typical (4.5V to 5.5V operating range, 7V absolute max). Quiescent supply current ~520 uA (DE high) / ~430 uA (DE low). Decouple locally with a 0.1 uF ceramic capacitor to GND."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/e50d2f88ccbbee28e6f3d4c68f46fd9a.pdf",
"pages": 10,
"sha256": "ed3c328b4c0cfd81",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"pin1": {
"pad": "1",
"at": [
-2.475,
-1.905
],
"corner": "top-left",
"source": "silk-marker",
"derived_from": "SOIC-8_3.9x4.9mm_P1.27mm@sha256:074ecb2092b24fa4",
"mark": "drawn"
},
"models_3d": [
{
"file": "ssp485n.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "ssp485n-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6,
4.9,
1.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "87e4d8dc8ea42b895369e191c9c3a15ea540d6ad3db35fcbcfdf34833945c372",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "Shanghai Siproin Microelectronics",
"Package": "SOP-8",
"Category": "Interface",
"Pins": "8"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"ssp485n"
],
"discovery_pitch": "SSP485N (Shanghai Siproin Microelectronics) component page with datasheet-verified CAD.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"ssp485n.kicad_sym",
"ssp485n.kicad_mod",
"ssp485n.glb",
"ssp485n.step",
"ssp485n-etched.step",
"ssp485n.lbr",
"docs/hero.png",
"docs/ssp485n-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html"
],
"visibility": {
"public": true
},
"variants": [
{
"mpn": "SSP485N",
"kind": "packaging"
}
],
"updated_at": "2026-09-25T08:11:17.518Z"
}