component
SSP1842
Public Made by Adomby adom
Shanghai Siproin Microelectronics Energy Metering ICs, SSOP-10-150mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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SSP1842
Shanghai Siproin Microelectronics · Energy Metering ICs · SSOP-10-150mil
SSP1842 from Shanghai Siproin Microelectronics, in a SSOP-10-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Power supply, 3.3V (operating range 3.0 to 3.6V; absolute maximum -0.3 to +4V). |
| 2 | IP | input | Positive analog differential input of the current channel, maximum input range ±42mVp-p (30mV RMS). |
| 3 | IN | input | Negative analog differential input of the current channel, maximum input range ±42mVp-p (30mV RMS). |
| 4 | VP | input | Analog input of the voltage channel, maximum input range ±100mVp-p (70mV RMS). |
| 5 | GND | power_in | Ground reference. |
| 6 | CF1 | output | Logic output whose function (energy pulse, over-current event, voltage zero crossing or current zero crossing) is set by the OT_FUNX register; the only configurable output on the SSOP10L package. |
| 7 | SEL | input | UART/SPI mode selection (0: UART, 1: SPI) with internal pull-down, so left unconnected it is low (UART) and tied directly to VDD it is high (SPI). |
| 8 | SCLK_BPS | input | Serial clock input for SPI (max 900kHz); in UART mode it configures the baud rate (4800bps when low, 9600bps when high). |
| 9 | RX/SDI | input | UART/SPI multiplexed pin: UART RX or SPI data input. |
| 10 | TX/SDO | tri_state | UART/SPI multiplexed pin: UART TX or SPI data output (high-impedance after the last SCLK of a read); needs an external pull-up resistor for the UART interface. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shanghai Siproin Microelectronics |
| Package | SSOP-10-150mil |
| Category | Data Converters |
| Pins | 10 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Supply | VDD | 3 | 3.6 | V | 5 | ||
| Power Voltage | VDD | -0.3 | 4 | V | 5 | ||
| Analog Input Voltage to GND | IP1,VP | -4 | 4 | V | 5 | ||
| Operating Temperature Range | T | -40 | 85 | ℃ | Tamb=25℃ unless specified | 5 | |
| Storage Temperature Range | Tstg | -40 | 85 | ℃ | 5 | ||
| Active energy measurement accuracy (large signal) | 0.2 | % | 30A~100mA Input@1mohm sampling resistor | 5 | |||
| Active energy measurement accuracy (small signal) | 0.4 | % | 100mA~50mA Input@1mohm sampling resistor | 5 | |||
| Active energy measurement accuracy (tiny signal) | 0.6 | % | 50mA~10mA Input@1mohm sampling resistor | 5 | |||
| RMS measurement accuracy (large signal) | 0.2 | % | 30A~100mA Input@1mohm sampling resistor | 5 | |||
| RMS measurement accuracy (small signal) | 2 | % | 100mA~50mA Input@1mohm sampling resistor | 5 | |||
| RMS measurement accuracy (tiny signal) | 6 | % | 50mA~10mA Input@1mohm sampling resistor | 5 | |||
| Fast RMS response time 50Hz | 10 | 160 | mS | 50Hz, can be set to cycle/half cycle | 6 | ||
| Fast RMS response time 60Hz | 8.3 | 133 | mS | 60Hz | 6 | ||
| Measurement error caused by phase angle between channels (capacitance) | PF08err | 0.5 | % | Phase advance 37° (PF=0.8) | 6 | ||
| Measurement error caused by phase angle between channels (sensibility) | PF05err | 0.5 | % | Phase delay 60° (PF=0.5) | 6 | ||
| AC power suppression | ACPSRR | 0.1 | % | IP/N=100mV | 6 | ||
| DC power suppression | DCPSRR | 0.1 | % | VP/N=100mV | 6 | ||
| Logic input high-level | 2.6 | V | VDD=3.3V±5% | 6 | |||
| Logic input low-level | 0.8 | V | VDD=3.3V±5% | 6 | |||
| Logic output high-level | -0.5 | V | VDD=3.3V±5%, IOH=5mA (printed VDD-0.5) | 6 | |||
| Logic output low-level | 0.5 | V | VDD=3.3V±5%, IOL=5mA | 6 | |||
| Byte-to-Byte Delay by MCU | t1 | 0 | 20 | mS | UART | 20 | |
| Delay between MCU register address end and SSP1842 byte | t2 | 150 | uS | UART read operation | 20 | ||
| Power Dissipation | Iop | 3 | mA | VDD=3.3V | 5 | ||
| Zero-crossing signal output delay | 570 | uS | 6 | ||||
| Differential current input (peak) | 42 | mV | 6 | ||||
| Differential voltage input (peak) | 100 | mV | 6 | ||||
| Analog input impedance | 370 | kΩ | 6 | ||||
| SEL pull-down resistor | SEL(pull-down) | 56.9 | kΩ | 6 | |||
| Analog input bandwidth (-3dB) | 3.5 | kHz | 6 | ||||
| Internal voltage reference | Vref | 1.218 | V | 6 |
CAD (KiCad official)
- Symbol:
SSP1842 - Footprint:
Package_SO:SSOP-10_3.9x4.9mm_P1.00mm - 3D model: SSOP-10-150mil (KiCad packages3D, STEP)
- 3D model files:
ssp1842-etched.step/ssp1842-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ssp1842.step/ssp1842.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shanghai Siproin Microelectronics datasheet (23 pp, sha256
96c404806ad1425d, retrieved 2026-10-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).