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Contents

README

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SSM6L09FU

TOSHIBA · MOSFETs · SOT-363

SSM6L09FU from TOSHIBA, in a SOT-363. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SOURCE 1 passive Source of Q1 (N-channel MOSFET, VDSS 30 V, ID 400 mA DC).
2 GATE 1 input Gate of Q1 (N-channel), VGSS ±20 V, Vth 1.1 to 1.8 V.
3 DRAIN 2 passive Drain of Q2 (P-channel MOSFET, VDSS −30 V, ID −200 mA DC).
4 SOURCE 2 passive Source of Q2 (P-channel MOSFET).
5 GATE 2 input Gate of Q2 (P-channel), VGSS ±20 V, Vth −1.1 to −1.8 V.
6 DRAIN 1 passive Drain of Q1 (N-channel MOSFET, VDSS 30 V, ID 400 mA DC).

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOT-363
Category Transistors/Thyristors
Pins 6

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Q1 Drain-Source voltage VDSS 30 V Ta = 25°C 1
Q1 Gate-Source voltage VGSS -20 20 V Ta = 25°C 1
Q1 DC drain current ID 400 mA DC, Ta = 25°C 1
Q1 Pulse drain current IDP 800 mA Pulse, Ta = 25°C 1
Q2 Drain-Source voltage VDSS -30 V Ta = 25°C 1
Q2 Gate-Source voltage VGSS -20 20 V Ta = 25°C 1
Q2 DC drain current ID -200 mA DC, Ta = 25°C 1
Q2 Pulse drain current IDP -400 mA Pulse, Ta = 25°C 1
Power dissipation (Q1, Q2 common) PD 300 mW Note 1: total rating, mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.32 mm2 × 6) 1
Channel temperature (Q1, Q2 common) Tch 150 °C 1
Storage temperature range (Q1, Q2 common) Tstg -55 150 °C 1
Q1 Gate leakage current IGSS -1 1 μA VGS = ±16 V, VDS = 0 3
Q1 Drain-Source breakdown voltage V(BR)DSS 30 V ID = 1 mA, VGS = 0 3
Q1 Drain cut-off current IDSS 1 μA VDS = 30 V, VGS = 0 3
Q1 Gate threshold voltage Vth 1.1 1.8 V VDS = 5 V, ID = 0.1 mA 3
Q1 Forward transfer admittance /Yfs/ 270 mS VDS = 5 V, ID = 200 mA (Note2) 3
Q1 Drain-Source on-resistance RDS(ON) 0.5 0.7 Ω ID = 200 mA, VGS = 10 V (Note2) 3
Q1 Drain-Source on-resistance RDS(ON) 0.8 1.2 Ω ID = 200 mA, VGS = 4 V (Note2) 3
Q1 Drain-Source on-resistance RDS(ON) 1 1.7 Ω ID = 200 mA, VGS = 3.3 V (Note2) 3
Q2 Gate leakage current IGSS -1 1 μA VGS = ±16 V, VDS = 0 4
Q2 Drain-Source breakdown voltage V(BR)DSS -30 V ID = −1 mA, VGS = 0 4
Q2 Drain cut-off current IDSS -1 μA VDS = −30 V, VGS = 0 4
Q2 Gate threshold voltage Vth -1.1 -1.8 V VDS = −5 V, ID = −0.1 mA 4
Q2 Forward transfer admittance /Yfs/ 115 mS VDS = −5 V, ID = −100 mA (Note3) 4
Q2 Drain-Source on-resistance RDS(ON) 2.1 2.7 Ω ID = −100 mA, VGS = −10 V (Note3) 4
Q2 Drain-Source on-resistance RDS(ON) 3.3 4.2 Ω ID = −100 mA, VGS = −4 V (Note3) 4
Q2 Drain-Source on-resistance RDS(ON) 4 6 Ω ID = −100 mA, VGS = −3.3 V (Note3) 4

CAD (KiCad official)

  • Symbol: SSM6L09FU
  • Footprint: Package_TO_SOT_SMD:SOT-363_SC-70-6
  • 3D model: SOT-363 (KiCad packages3D, STEP)
  • 3D model files: ssm6l09fu-etched.step / ssm6l09fu-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssm6l09fu.step / ssm6l09fu.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (9 pp, sha256 6c9872d517b6a798, retrieved 2026-11-04, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF