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Contents

README

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SSM3K341R

TOSHIBA · MOSFETs · SOT-23F

SSM3K341R from TOSHIBA, in a SOT-23F. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal; gate-source voltage rated ±20 V absolute maximum, with threshold voltage 1.5 V min to 2.5 V max at VDS = 10 V, ID = 0.1 mA.
2 Source passive Source terminal; drain current rated 6 A DC and 24 A pulsed (pulse width ≤ 1 ms, duty ≤ 1 %).
3 Drain passive Drain terminal; drain-source voltage rated 60 V absolute maximum with RDS(ON) of 28 mΩ typ. at VGS = 10 V.

Key specifications

Parameter Value
Manufacturer TOSHIBA
Package SOT-23F
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: SSM3K341R
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23F (KiCad packages3D, STEP)
  • 3D model files: ssm3k341r-etched.step / ssm3k341r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ssm3k341r.step / ssm3k341r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TOSHIBA datasheet (9 pp, sha256 3287d2e54d272f27, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF