# SS8201B

**orisilicon** · AC-DC Controllers And Regulators · SOP-8

SS8201B from orisilicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Chip supply pin, decoupled with a 4.7uF ceramic capacitor between VCC and GND; the internal 10V regulator clamps VCC and the datasheet gives an absolute maximum of -0.3V to +10V. |
| 2 | GND | power_in | Chip ground pin that serves as both the power ground and the signal ground, with the power and signal grounds connected at a single point to this pin. |
| 3 | FB | input | Feedback sampling pin that directly senses the output voltage for constant-voltage control, with an absolute voltage range of -0.3V to +6V. |
| 4 | CS | input | Current sense pin, where the current sense resistor between CS and GND sets the overcurrent point and the absolute voltage range is -0.3V to +6V. |
| 5 | HVM | passive | Built-in high-voltage MOS drain terminal with an absolute maximum voltage of 800V. |
| 6 | HVM | passive | Built-in high-voltage MOS drain terminal with an absolute maximum voltage of 800V. |
| 7 | NC | unconnected | Not connected; this pin is left floating. |
| 8 | HVJ | passive | Built-in high-voltage JFET and resistor input pin with an absolute maximum voltage of 1000V, used for high-voltage startup from the bus. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | orisilicon |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range VCC | VCC | -0.3 |  | 10 | V |  | 3 |
| CS and FB pin voltage range | VCS VFB | -0.3 |  | 6 | V |  | 3 |
| Operating ambient temperature range | TA | -40 |  | 105 | ℃ |  | 3 |
| Operating junction temperature range | TJ | -40 |  | 150 | ℃ |  | 3 |
| Storage ambient temperature range | TSTG | -55 |  | 150 | ℃ |  | 3 |
| Maximum operating frequency | FSW_max | 25 | 50 | 75 | KHz |  | 2 |
| Internal error amplifier reference | VFB_REF | 1.97 | 2 | 2.03 | V |  | 2 |
| Drain-source breakdown voltage | BVDSS | 800 |  |  | V | ID=250 µA | 2 |
| High voltage startup breakdown voltage | BVDSS(JFET) | 900 | 1000 |  | V | VCC=10V | 2 |
| Drain-source on-resistance | RDS_ON |  | 10 | 11.5 | Ohm | ID=0.5A | 2 |
| Drain pin HVM maximum voltage | HVM |  |  | 800 | V |  | 3 |
| Drain voltage maximum | VDS_MAX |  |  | 800 | V |  | 3 |
| HVJ pin maximum voltage | HVJ |  |  | 1000 | V |  | 3 |
| VCC clamp current maximum | VCC_CLP |  |  | 10 | mA |  | 3 |
| Human body model ESD capability | ESDhbm |  |  | 2000 | V |  | 3 |
| Thermal resistance junction to ambient, 8-lead SOP | θJA |  | 145 |  | °C/W |  | 3 |
| VCC clamp voltage | VCC_CLP |  | 10 |  | V | ICC = 10mA | 2 |
| VCC start-up threshold | VCC_ON |  | 8.5 |  | V | VCC rising | 2 |
| VCC undervoltage protection threshold | VCC_uvLo |  | 6.5 |  | V | VCC falling | 2 |
| VCC start-up current | VCC_ST |  | 230 |  | µA | VCC rising, but VCC<VCC_ON | 2 |
| VCC operating current | VCC_OP |  | 160 |  | µA | VFB=2V | 2 |
| Maximum on time | VON_MAX |  | 12 |  | µs |  | 2 |
| Minimum off time | Vof_Min |  | 14 |  | µs |  | 2 |
| Internal soft start time | TSoft_state |  | 3 |  | ms |  | 2 |
| Peak current threshold | VIPK |  | 200 |  | mV |  | 2 |
| Abnormal overcurrent protection threshold | VAOSP |  | 250 |  | mV |  | 2 |
| Current sense leading edge blanking time | TLEB_CS |  | 150 |  | ns |  | 2 |
| Output overload protection threshold | VFB_OLP |  | 1.87 |  | V |  | 2 |
| Output overload protection delay | TD_OLP |  | 160 |  | ms |  | 2 |
| Auto recovery delay time | TAUTO_RE |  | 1.6 |  | S |  | 2 |
| Overtemperature protection threshold | TOTP_TH |  | 150 |  | ℃ |  | 2 |
| Overtemperature protection hysteresis | TOTP_HYS |  | 30 |  | ℃ |  | 2 |
| Off-state drain leakage current | IOFF |  | 10 |  | µA | VSW =800V | 2 |

## CAD (KiCad official)

- Symbol: `SS8201B`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `ss8201b-etched.step` / `ss8201b-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ss8201b.step` / `ss8201b.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [orisilicon datasheet](docs/ss8201b-datasheet.pdf) (11 pp, sha256 `9bb2d70b0150c35d`, retrieved 2026-10-27, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ss8201b-datasheet.pdf)