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Contents

README

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SS8050-G

Comchip · Bipolar (BJT) · SOT-23

SS8050-G from Comchip, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 BASE passive Base terminal of the NPN general-purpose transistor; the emitter-base breakdown voltage V(BR)EBO is rated at 5 V minimum with VEB = 5 V maximum leakage of 0.1 µA.
2 EMITTER passive Emitter terminal of the NPN transistor; the device is rated for a collector current IC of 1.5 A and a collector power dissipation PC of 300 mW.
3 COLLECTOR passive Collector terminal of the NPN transistor; rated VCBO 40 V and VCEO 25 V, with a junction temperature limit TJ of 150 °C.

Key specifications

Parameter Value
Manufacturer Comchip
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: SS8050-G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: ss8050-g-etched.step / ss8050-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ss8050-g.step / ss8050-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Comchip datasheet (5 pp, sha256 0ffc4d0965c57e62, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF