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Ray Publish 0.1.0 1fb3ed3 10d ago

SS550

orisilicon · AC-DC Controllers And Regulators · ESOP-8

SS550 from orisilicon, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HV power_in High-voltage power input; the datasheet gives an input range of 40VDC to 900VDC, with BV up to 1000V.
2 NC unconnected No connection; left floating.
3 NC unconnected No connection; left floating.
4 GND power_in Chip ground.
5 BGIN input 1.3V voltage input; on SS550 a resistor between REG9 and BGIN sets the REG9 output between 1.3V and 9V.
6 REG9 power_out 9V voltage output (typ. 9V); on SS550 it is adjustable from 1.3V to 9V through a resistor to BGIN, with an absolute maximum of 22V to GND.
7 REG18 power_out 18V voltage output (typ. 18V), with an absolute maximum of 22V to GND.
8 HVR passive High-voltage resistor output; an internal 48MΩ resistor between HV and HVR allows sensing of the high-voltage input, with an absolute maximum of 1000V to GND.
9 Epad power_in Exposed pad connected to chip ground for heat dissipation.

Key specifications

Parameter Value
Manufacturer orisilicon
Package ESOP-8
Category Power Management (PMIC)
Pins 9

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage HV HV 900 V 2
Supply current (power consumption) IQ 15 20 µA HV = 50V 2
18V output current IOUT18 16 mA HV=50V, REG18=5V 2
18V output current IOUT18 24 mA HV=50V, REG18=0V 2
9V output current IOUT9 20 mA REG18=18V 2
18V line regulation ΔVOUT18 2.5 V HV=50V to 900V, IOUT =0.5mA 2
18V load regulation ΔVOUT18 10 V HV=50V, IOUT =1uA to 10mA 2
9V line regulation ΔVOUT9 100 mV IOUT =1mA , REG18=11V to 18V 2
9V load regulation ΔVOUT9 200 mV IOUT =1uA to 20mA, REG18=18V 2
High-voltage resistor between HV and HVR RHV 48 MΩ R between HV and HVR 2
BGIN to GND resistor Rdn 600 KΩ R between BGIN and GND 2
BGIN to REG9 resistor Rup 3.6 MΩ R between REG9 and BGIN 2
HV, HVR to GND voltage -0.3 1000 V 3
REGB to GND voltage -0.3 30 V 3
REG18, REG9 to GND voltage -0.3 22 V 3
BGIN to GND voltage -0.3 9 V 3
Storage temperature range -65 150 °C 3
Operating junction temperature range -40 125 °C 3
Operating ambient temperature range -40 85 °C 3
Junction-to-ambient thermal resistance θJA 45 °C/W 8-Lead SOP 3
Junction-to-case thermal resistance θJC 15 °C/W 8-Lead SOP 3

CAD (KiCad official)

  • Symbol: SS550
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: ss550-etched.step / ss550-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ss550.step / ss550.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: orisilicon datasheet (10 pp, sha256 5e95ca8aa16d2a3f, retrieved 2026-10-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF