component
SS4125B
Public Made by Adomby adom
orisilicon Leakage Protection ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+117−8@@ -1,13 +1,127 @@ {+ "schema_version": 1,+ "type": "component", "slug": "ss4125b",+ "title": "SS4125B",+ "brief": "orisilicon Leakage Protection ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "orisilicon Leakage Protection ICs, SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "power management (pmic)", "ss4125b" ],+ "component": {+ "mpn": "SS4125B",+ "manufacturer": "orisilicon",+ "package": "SOP-8",+ "pin_count": 8,+ "category": "Power Management (PMIC)",+ "subcategory": "Leakage Protection ICs",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590916787070582784",+ "parts": {+ "symbol": "ss4125b.kicad_sym",+ "footprint": "ss4125b.kicad_mod",+ "model_3d": "ss4125b.glb",+ "model_3d_step": "ss4125b.step",+ "lbr": "ss4125b.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "IN1",+ "type": "input",+ "description": "Op-amp input pin 1. Non-inverting/inverting input of the internal leakage-detection amplifier; connected to one side of the current-transformer sampling network. Trip threshold |IN1 - IN2| = 4.95 mV typical (VT)."+ },+ {+ "number": "2",+ "name": "IN2",+ "type": "input",+ "description": "Op-amp input pin 2. Second input of the internal leakage-detection amplifier; connected to the other side of the current-transformer sampling network. Trip threshold |IN1 - IN2| = 4.95 mV typical."+ },+ {+ "number": "3",+ "name": "GND",+ "type": "power_in",+ "description": "Chip ground reference."+ },+ {+ "number": "4",+ "name": "OA",+ "type": "output",+ "description": "Filter / anti-delay adjustable output pin. External capacitor sets the inverse-time (anti-delay) trip curve; internal amplifier integrates leakage current into a ramping voltage compared against a 1.5V reference. Absolute max -0.3V to +6V."+ },+ {+ "number": "5",+ "name": "DLY",+ "type": "output",+ "description": "Fixed delay pin; connect external delay capacitor CD to GND. A 3 uA (IZTAT) current source charges CD against a 1.5V reference (VREFCDLY) to set the delay time TD = CD x VREF / ID. CD must be >= 82 nF for the high-frequency leakage suppression to work down to 80-100 Hz (fSUP)."+ },+ {+ "number": "6",+ "name": "OSHV",+ "type": "output",+ "description": "High-voltage MOSFET trigger output. Drives an external high-voltage MOS gate directly; VOS_HV = 10V typ (12V max) with VS = 12V; minimum HV MOS drive current 5 mA. Absolute max -0.3V to +15V. Emits a 3-pulse control signal (30 ms/100 ms duty)."+ },+ {+ "number": "7",+ "name": "OSLV",+ "type": "output",+ "description": "Controllable SCR (silicon controlled rectifier) trigger output. VOS_LV = 5V typ (6V max) with VS = 12V; minimum SCR drive current 0.2 mA; IOS_LV up to 850 uA typ at OS = 0.8V. Absolute max -0.3V to +6V. Emits 3 pulses (30 ms/100 ms duty)."+ },+ {+ "number": "8",+ "name": "VS",+ "type": "power_in",+ "description": "Supply pin. Internal clamping/regulator: VS1 = 12V typ, VS2 = 11-13V clamp @ IS = 1 mA; supply current IS1 = 168-252 uA at VS = 8V (200 uA typical). Absolute max -0.3V to +24V. Typically fed from an in-line dropper (e.g. SS550)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590916787070582784",+ "pages": 13,+ "sha256": "7f12abc136134065",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "orisilicon",+ "Package": "SOP-8",+ "Category": "Power Management (PMIC)",+ "Pins": "8"+ }+ },+ "variants": [],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "ss4125b"+ ],+ "discovery_pitch": "SS4125B (orisilicon) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +139,5 @@ "docs/ss4125b-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }