component
SS4125B
Public Made by Adomby adom
orisilicon Leakage Protection ICs, SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSS4125B
orisilicon · Leakage Protection ICs · SOP-8
SS4125B from orisilicon, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN1 | input | Op-amp input pin 1. Non-inverting/inverting input of the internal leakage-detection amplifier; connected to one side of the current-transformer sampling network. Trip threshold |
| 2 | IN2 | input | Op-amp input pin 2. Second input of the internal leakage-detection amplifier; connected to the other side of the current-transformer sampling network. Trip threshold |
| 3 | GND | power_in | Chip ground reference. |
| 4 | OA | output | Filter / anti-delay adjustable output pin. External capacitor sets the inverse-time (anti-delay) trip curve; internal amplifier integrates leakage current into a ramping voltage compared against a 1.5V reference. Absolute max -0.3V to +6V. |
| 5 | DLY | output | Fixed delay pin; connect external delay capacitor CD to GND. A 3 uA (IZTAT) current source charges CD against a 1.5V reference (VREFCDLY) to set the delay time TD = CD x VREF / ID. CD must be >= 82 nF for the high-frequency leakage suppression to work down to 80-100 Hz (fSUP). |
| 6 | OSHV | output | High-voltage MOSFET trigger output. Drives an external high-voltage MOS gate directly; VOS_HV = 10V typ (12V max) with VS = 12V; minimum HV MOS drive current 5 mA. Absolute max -0.3V to +15V. Emits a 3-pulse control signal (30 ms/100 ms duty). |
| 7 | OSLV | output | Controllable SCR (silicon controlled rectifier) trigger output. VOS_LV = 5V typ (6V max) with VS = 12V; minimum SCR drive current 0.2 mA; IOS_LV up to 850 uA typ at OS = 0.8V. Absolute max -0.3V to +6V. Emits 3 pulses (30 ms/100 ms duty). |
| 8 | VS | power_in | Supply pin. Internal clamping/regulator: VS1 = 12V typ, VS2 = 11-13V clamp @ IS = 1 mA; supply current IS1 = 168-252 uA at VS = 8V (200 uA typical). Absolute max -0.3V to +24V. Typically fed from an in-line dropper (e.g. SS550). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | orisilicon |
| Package | SOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
SS4125B - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
ss4125b-etched.step/ss4125b-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ss4125b.step/ss4125b.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: orisilicon datasheet (13 pp, sha256
7f12abc136134065, retrieved 2026-08-17, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).